An electronic device includes a case, a ceramic element, a first metal terminal, and a second metal terminal. The case includes a recess and a case lower surface facing opposite to its opening. The ceramic element is disposed in the recess and includes first and second main surfaces opposing to each other, a first electrode portion formed on the first main surface, and a second electrode portion formed on the second main surface. The first metal terminal includes a first mounting portion disposed on the case lower surface and being substantially parallel to the first and second main surfaces and a first electrode connection portion connected to the first electrode portion. The second metal terminal includes a second mounting portion disposed on the case lower surface and being substantially parallel to the first and second main surfaces and a second electrode connection portion connected to the second electrode portion.

Disclosed herein is an electronic component that includes an element body having a structure in which a plurality of conductor layers are stacked in a first direction on a surface of a substrate with insulating layers interposed therebetween, and a plurality of terminal electrodes provided on a mounting surface of the element body. The mounting surface extends in the first direction and in a second direction perpendicular to the first direction. The element body includes an inductor constituted by the plurality of conductor layers and has a coil axis extending in a third direction perpendicular to both the first and second directions.

A capacitor comprises a body of dielectric material in which an anode and a cathode are arranged in a stack. A capacitance-forming layer of the dielectric material is arranged between the anode and the cathode. The capacitor further comprises an electro-mechanical connection, which comprises a hole which extends into the body in the direction of the stack. The hole includes an electrical connector. The electrical connector is in electrical contact with either the anode or the cathode, comprises a compliant element, and is suitable for holding a contact pin. The compliant element is configured to decouple the body from mechanical forces applied to the contact pin. The compliant element reduces mechanical stresses experienced by the body of the capacitor. Also provided is a capacitor assembly comprising two or more such capacitors; a kit for assembling such capacitors, and the use of an electrical termination to protect a capacitor from stress.

A capacitor comprises a body of dielectric material in which an anode and a cathode are arranged in a stack. A capacitance-forming layer of the dielectric material is arranged between the anode and the cathode. The capacitor further comprises an electro-mechanical connection, which comprises a hole which extends into the body in the direction of the stack. The hole includes an electrical connector. The electrical connector is in electrical contact with either the anode or the cathode, comprises a compliant element, and is suitable for holding a contact pin. The compliant element is configured to decouple the body from mechanical forces applied to the contact pin. The compliant element reduces mechanical stresses experienced by the body of the capacitor. Also provided is a capacitor assembly comprising two or more such capacitors; a kit for assembling such capacitors, and the use of an electrical termination to protect a capacitor from stress.

A DC link capacitor (8) comprises a capacitor housing, a plurality of capacitor cells (1), each comprising a film capacitor element (2) with a wound metallized film and two contact terminals (3a, 3b) connected to the metallized plastic film. The plurality of capacitor cells (1) are arranged in the capacitor housing (4) and are sealed therein by means of a sealing material (7). The contact terminals (3a, 3b) are electrically isolated from each other and protrude separately out of the sealing material (7), in order to be connected by means of bus bars.

A semiconductor device includes passive electrical components in a substrate; and an interconnect structure over the passive electrical components, conductive features of the interconnect structure being electrically coupled to the passive electrical components. The conductive features of the interconnect structure includes a first conductive line over the substrate; a conductive bump over the first conductive line, where in a plan view, the conductive bumps has a first elongated shape and is entirely disposed within boundaries of the first conductive line; and a first via between the first conductive line and the conductive bump, the first via electrically connected to the first conductive line and the conductive bump, where in the plan view, the first via has a second elongated shape and is entirely disposed within boundaries of the conductive bump.

A miniaturization process of passive electronic components is revealed. The miniaturization process mainly includes the steps of reforming, reacting at high temperature, preparing paste, dipping in the paste, light curing, packaging, heat curing, cutting pins, coating silver paste, heating and drying, and engraving by laser. The miniaturization process makes production of the passive components with thinner, smaller, and lightweight deign easier and the more convenient. The service life of the passive components is also extended and applications of the passive components are broader.

In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface bonded to the element and a second surface opposite the first surface. The passive electronic component can comprise a first anode terminal bonded to a corresponding second anode terminal of the element and a first cathode terminal bonded to a corresponding second cathode terminal of the element. The first anode terminal and the first cathode terminal can be disposed on the first surface of the passive electronic component.

In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface bonded to the element and a second surface opposite the first surface. The passive electronic component can comprise a first anode terminal bonded to a corresponding second anode terminal of the element and a first cathode terminal bonded to a corresponding second cathode terminal of the element. The first anode terminal and the first cathode terminal can be disposed on the first surface of the passive electronic component.

A semiconductor device having a semiconductor substrate with first and second main surfaces that face one another in a thickness direction, and a circuit layer disposed on the first main surface. The circuit layer has a first electrode layer on the semiconductor substrate, a dielectric layer on the first electrode layer, a second electrode layer on the dielectric layer, and first and second outer electrodes electrically connected to the first and second electrode layers, respectively. The semiconductor substrate has a first end-portion region in which the circuit layer is not provided on the semiconductor substrate and on the side of the first end surface. In the first end-portion region, a first exposed portion is provided that is exposed between the first main surface and the first end surface.