A flexible cable includes an elongated flexible substrate including first and second surfaces on opposite sides thereof, a first capacitor electrode provided on the first surface side of the flexible substrate, the first capacitor electrode extending from a first end of the flexible substrate toward a second end of the flexible substrate, a second capacitor electrode provided on the second surface side of the flexible substrate, the second capacitor electrode extending from the second end of the flexible substrate toward the first end of the flexible substrate, a first connection portion provided at an end of the first capacitor electrode located at the first end of the flexible substrate, and a second connection portion provided at an end of the second capacitor electrode located at the second end of the flexible substrate.

A flexible cable includes an elongated flexible substrate including first and second surfaces on opposite sides thereof, a first capacitor electrode provided on the first surface side of the flexible substrate, the first capacitor electrode extending from a first end of the flexible substrate toward a second end of the flexible substrate, a second capacitor electrode provided on the second surface side of the flexible substrate, the second capacitor electrode extending from the second end of the flexible substrate toward the first end of the flexible substrate, a first connection portion provided at an end of the first capacitor electrode located at the first end of the flexible substrate, and a second connection portion provided at an end of the second capacitor electrode located at the second end of the flexible substrate.

An electronic device including a substrate comprising a hole, and a capacitor capable of being inserted and fixed to the hole of the substrate. The electronic device includes a substrate including a hole, and a capacitor inserted to the hole so as to be mounted on the substrate. The capacitor includes a case provided to accommodate a dielectric therein and forming an exterior of the capacitor, a lead wire connected to the dielectric and extending from an inside of the case to an outside of a first side surface of the case, and a groove recessed on a second side surface of the case opposite to the first side surface and provided to be engaged with a side, which forms a circumference of the hole, of the substrate to allow the case to be inserted and fixed to the hole.

A silicon capacitor may include a silicon substrate having a three-dimensional pattern, and a dielectric thin film disposed over the silicon substrate and having a structure with a crystal gradient form. A manufacturing method of a dielectric thin film capacitor may include etching a silicon substrate to form a three-dimensional pattern, depositing an amorphous thin film on the etched silicon substrate at a temperature below 300° C., and embedding crystalline grains in the deposited amorphous thin film by performing plasma treatment. A manufacturing method of a dielectric thin film capacitor may include etching a silicon substrate to form a three-dimensional pattern, depositing an amorphous thin film on the etched silicon substrate at a temperature below 300° C., and depositing a crystalline layer on the deposited amorphous thin film by performing plasma treatment.

Embodiments herein relate to systems, apparatuses, or processes directed to electrically coupled trench capacitors within a substrate. The substrate may be part of an interposer, such as a glass interposer, where the trench capacitors deliver a high capacitance density close to one or more dies that are attached to a surface of the substrate. Portions of the trench capacitor may be a thin film capacitor at a surface of the substrate. The trenches extend from a first side of the substrate toward a second side of the substrate opposite the first side. Other embodiments may be described and/or claimed.

Capacitive interconnects and processes for fabricating the capacitive interconnects are provided. In some embodiments, the capacitive interconnect includes first metal layers, second metal layers; and dielectric layers including a dielectric layer that intercalates a first metal layer of the first metal layers and a second metal layer of the second metal layers. Such layers can be assembled in a nearly concentric arrangement, where the dielectric layer abuts the first metal layer and the second metal layer abuts the dielectric layer. In addition, the capacitive interconnect can include a first electrode electrically coupled to at least one of the first metal layers, and a second electrode electrically coupled to at least one of the second metal layers, the second electrode assembled opposite to the first electrode. The first electrode and the second electrode can include respective solder tops. The capacitive interconnects can be utilized in a semiconductor package, providing a compact assembly that can reduce the utilization of real estate in a board substrate onto which the semiconductor package is mounted.

Embodiments herein relate to systems, apparatuses, or processes directed to packages that include one or more glass cores that have thin film capacitors on one or more sides of the one or more glass cores. The film capacitors may be formed in-situ on the glass cores during substrate manufacturing. Other embodiments may be described and/or claimed.

A capacitor element includes first through sixth surfaces, a first-side outer electrode at a first end portion of the first surface and on portions of the third, fifth, and sixth surfaces, a second-side outer electrode at a second end portion of the first surface and on portions of the fourth, fifth, and sixth surfaces, a center outer electrode at a portion of the first surface between the first-side outer electrode and the second-side outer electrode and on portions of the fifth and sixth surfaces, and two outermost conductor layers of first and second conductor layers are disposed at both outermost ends in the width direction, a first of the two outermost conductor layers next to one of the first conductor layers with an inner dielectric layer therebetween is connected to the center outer electrode, and a second of the pair of outermost conductor layers next to one of the second conductor layers with an inner dielectric layer therebetween is connected to the first-side outer electrode and the second-side outer electrode.

A multilayer ceramic electronic component includes a laminated body, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The insulating coating portions extend in a laminating direction between each of the second external electrodes and the first external electrode on a second principal surface, and from the second principal surface to respective portions of first and second side surfaces. A maximum thickness of the first external electrode on the second principal surface is larger than a maximum thickness for each of the second external electrodes on the second principal surface. A maximum thickness for each of the insulating coating portions on the second principal surface is larger than the maximum thickness of the first external electrode on the second principal surface.

A multilayer ceramic electronic component includes a laminated body, a first external electrode, a pair of second external electrodes, and a pair of insulating coating portions. The insulating coating portions extend in a laminating direction between each of the second external electrodes and the first external electrode on a second principal surface, and from the second principal surface to respective portions of first and second side surfaces. A maximum thickness of the first external electrode on the second principal surface is larger than a maximum thickness for each of the second external electrodes on the second principal surface. A maximum thickness for each of the insulating coating portions on the second principal surface is larger than the maximum thickness of the first external electrode on the second principal surface.