A nanowire structure is manufactured by forming islands of conductive material on a substrate, and a conductive sacrificial layer in the space between conductive islands. The conductive islands include an anodic etch barrier layer. An anodizable layer is formed, over the conductive islands and sacrificial layer, and anodized to form a porous template. Nanowires are formed in regions of the porous template that overlie the conductive islands. Removal of the porous template and sacrificial layer leaves a nanowire structure including isolated groups of nanowires connected to respective conductive islands which function as current collectors. Respective stacks of conductive and insulator layers are formed over different groups of the nanowires to form respective capacitors that are electrically isolated from one another. A monolithic component may thus be formed including an array of isolated capacitors formed over nanowires.

A composite film having a high dielectric permittivity engineered particles dispersed in a high breakdown strength polymer material to achieve high energy density.

Present disclosure provide a capacitor includes: a semiconductor substrate; a laminated structure including n conductive layers and m dielectric layer(s), the i-th conductive layer being provided with at least one i-th isolation trench, the (i+1)-th conductive layer being provided above the i-th conductive layer and in the i-th isolation trench, isolation trenches in odd-numbered and even-numbered conductive layers having a first and a second overlap region in a vertical direction respectively, and the first overlap region not overlapping the second overlap region, where m, n, and i are positive integers, n≥2, and 1≤i≤n−1; at least one first external electrode electrically connected to all odd-numbered conductive layer(s) through a first conductive via structure in the second overlap region; and at least one second external electrode electrically connected to all even-numbered conductive layer(s) through a second conductive via structure in the first overlap region.

A film capacitor includes a stack including at least one dielectric film and a plurality of metal films, the at least one dielectric film including a polyarylate film, wherein each of the at least one of dielectric film and each of the plurality of metal films are alternately stacked in a stacking direction, each of the plurality of metal films deposited on each of the at least one dielectric film by vapor deposition, cover films on two first side surfaces, the two first side surfaces facing each other in a first direction, the first direction orthogonal to the stacking direction, the cover films containing a polyester hot-melt resin, and metal-sprayed electrodes on two second side surfaces, the two second side surfaces facing each other in a second direction, the second direction perpendicular to the first direction and orthogonal to the stacking direction.

An electronic device comprises a first blocking electrode; a second blocking electrode; and a dielectric material disposed between the first electrode and the second electrode, the dielectric material comprising a compound of Formula 1

Li.sub.24-b*y-c*z-a*xM.sup.1.sub.yM.sup.2.sub.zM.sup.3.sub.xO.sub.12-δ  (1)

wherein M.sup.1 is a cationic element having an oxidation state of b, wherein b is +1, +2, +3, +4, +5, +6, or a combination thereof; M.sup.2 is a cationic element having an oxidation state of c, wherein c is +1, +2, +3, +4, +5, +6, or a combination thereof; M.sup.3 is a cationic element having an oxidation state of a, wherein a is +1, +3, +4, or a combination thereof; 0≤y≤3; 0≤z≤3; 0≤x≤5; and 0≤δ≤2. Methods for the manufacture of the electronic device are also disclosed.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

A multilayer ceramic capacitor includes a ceramic body and first to fourth external electrodes. The ceramic body has first to fourth side surfaces, first to fourth ridges connecting the two side surfaces, and first and second internal electrodes. External electrodes cover the respective ridges and are connected to internal electrodes. The multilayer ceramic capacitor has a height dimension T of 110 μm or less, and a ratio of a width dimension W to a length dimension L of 0.5 or more and less than 0.85. The internal electrodes extend obliquely outward relative to the X-axis and Y-axis directions from the facing portions, and have lead-out portions towards the ridges.

A multilayer electronic component includes a body including a dielectric layer and an internal electrode; and an external electrode including an electrode layer disposed on the body and connected to the internal electrode and a conductive resin layer disposed on the electrode layer, and the conductive resin layer includes a metal wire, a conductive metal, and a base resin.

An LC resonance element (10) includes a dielectric film (12), a common electrode (11) formed of a thin-film conductor on a lower surface (12D) of the dielectric film, a first capacitor (C1) and a second capacitor (C2) that are connected in series via the common electrode (11) and constitute a thin-film capacitor (TC), first and second external connection terminals (14A, 14B) formed on an upper surface (12U) of the dielectric film, a thin-film conductive wire (16) constituting a thin-film inductor (TL), a first upper electrode (13A) of the first capacitor formed on the upper surface (12U), and a second upper electrode (13B) of the second capacitor formed on the upper surface (12U). The thin-film conductive wire (16) is formed in a region (R2) located on the upper surface (12U) of the dielectric film and outside the common electrode (11) in plan view.

A capacitor device comprised of a first conductor layer fabricated from a first material located between two dielectric layers located between second set of conductor layers fabricated from a second material located between two additional dielectric layers and at least another two first conductors. The first conductor layers all being electrically connected to one another and the second conductor layers being electrically connected to one another and not electrically connected to the first conductor for the purpose of storing electrical charge.