A capacitor component includes: a plurality of conductive nanowires disposed to be spaced apart from each other; first and second connecting conductive layers respectively disposed on one end and the other end of the plurality of conductive nanowires, and connected to the plurality of conductive nanowires; a conductive body surrounding the plurality of conductive nanowires; and a dielectric film disposed between the plurality of conductive nanowires, each of the first and second connecting conductive layers, and the conductive body.

A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal.

An apparatus includes a case having an elliptical cross-section capable of receiving a plurality of capacitive elements. One or more of the capacitive elements provide at least one capacitor having a first capacitor terminal and a second capacitor terminal. The apparatus also includes a cover assembly that includes a deformable cover mountable to the case, and, a common cover terminal having a contact extending from the cover. The cover assembly also includes at least three capacitor cover terminals, each of the at least three capacitor cover terminals having at least one contact extending from the deformable cover. The deformable cover is configured to displace at least one of the at least three capacitor cover terminals upon an operative failure of at least one of the plurality of the capacitive elements. The cover assembly also includes at least four insulation structures. One of the four insulation structures is associated with one of the at least three capacitor cover terminals. The apparatus also includes a first conductor capable of electrically connecting the first capacitor terminal of a capacitor provided by one of the plurality of capacitive elements to one of the at least three capacitor cover terminals and a second conductor capable of electrically connecting the second capacitor terminal of the capacitor provided by one of the plurality of capacitive elements to the common cover terminal.

An integrated capacitor that includes a plurality of capacitor elements, each of which has one of first internal electrodes and one of second internal electrodes; an exterior body accommodating the plurality of capacitor elements; a plurality of first external electrode layers on an outer surface of the exterior body and electrically connected to the first internal electrodes; and a plurality of second external electrode layers on the outer surface of the exterior body and electrically connected to the second internal electrodes. One of the first external electrode layers has a projecting portion projecting outward or a recessed portion recessed inward from part of an outer edge of the first external electrode layer in a plan view in a thickness direction of the first external electrode layer.

The capacitor array that includes: a capacitor layer including a plurality of capacitor portions divided by a plurality of through-portions and arranged in a plane, and the capacitor portions each have a first main surface and a second main surface that are opposite to each other in a thickness direction. The plurality of through-portions include a first through-portion extending in a first direction perpendicular to the thickness direction, and a second through-portion extending in a second direction perpendicular to the thickness direction and intersecting the first direction. In a sectional view, each of the first through-portion and the second through-portion independently has a taper having a width decreasing from one of the first main surface and the second main surface to the other main surface. The first through-portion has a taper angle that is different from a taper angle of the second through-portion.

Integrated devices comprising integrated circuits and energy storage devices are described. Disclosed energy storage devices correspond to an all-solid-state construction, and do not include any gels, liquids, or other materials that are incompatible with microfabrication techniques. Disclosed energy storage device comprises energy storage cells with electrodes comprising metal-containing compositions, like metal oxides, metal nitrides, or metal hydrides, and a solid state electrolyte.

A power capacitor includes a body that defines an interior space; and at least one capacitive device in the interior space. The capacitive device includes a first electrode; and a second electrode separated from the second electrode. The power capacitor also includes a dielectric nanofluid in the interior space and between the first electrode and the second electrode, the dielectric nanofluid including: a base dielectric fluid; and nanoparticles dispersed in the base dielectric fluid.

A first-tier capacitor assembly is formed, which includes a first alternating layer stack embedded within a first substrate and including at least two first metallic electrode layers interlaced with at least one first node dielectric layer, and first metallic bonding pads located on a first front surface. A second-tier capacitor assembly is formed, which includes a second alternating layer stack embedded within a second substrate and including at least two second metallic electrode layers interlaced with at least one second node dielectric layers, and second metallic bonding pads located on a second backside surface. The second metallic bonding pads are bonded to the first metallic bonding pads such that each of the at least two first metallic electrode layers contacts a respective one of the at least two second metallic electrode layers. A capacitor with increased capacitance is provided.

A semiconductor structure includes a substrate containing first-type deep trenches and second-type deep trenches. The first-type deep trenches and the second-type deep trenches have lengthwise sidewalls that laterally extend along different directions. The semiconductor structure includes a capacitor structure, which includes a layer stack containing at least three metallic electrode layers interlaced with at least two node dielectric layers. Each layer within the layer stack includes a horizontally-extending portion that overlies a top surface of the substrate and vertically-extending portions that protrude downward into a respective one of the first-type deep trenches and second-type deep trenches. The different orientations of the lengthwise directions of the deep trenches reduces deformation of the semiconductor structure. Stress-relief structures may be formed in corner regions of the capacitor structure to provide structural reinforcement.

A film capacitor includes: a main body portion including a first metallized film including a first metal film on a first face of a first dielectric film, and a second metallized film including a second metal film on a second face of a second dielectric film; and external electrodes. The first or second dielectric film is located between the first and second metal films. The external electrodes are disposed on main body ends so as to be electrically connected with the first or second metal film. At least one of the first and second metal films includes a first portion which has a film thickness of 20 nm or more and is located in proximity to the main body ends, and the first portion includes a first groove extending in the first direction and being in contact with corresponding one of the main body ends.