Disclosed herein is a method of bonding substrates, a microchip, and a method of manufacturing the microchip capable of joining two substrates in a higher adhered state even when at least one of the substrate has a warpage or a roll. A method of bonding a first substrate and a second substrate each of which is made of glass or a resin comprises: a surface activating step for activating each of joining surfaces of the first substrate and the second substrate; and a pressurizing step for pressurizing the first substrate and the second substrate in a state that the first substrate and the second substrate are stacked such that respective joining surfaces contact each other. The joining surface of the first substrate and/or the joining surface of the second substrate are constituted with a plurality of joining regions segmented to be separate from one another by a segmenting recessed portion.

A control device for controlling a semiconductor manufacturing apparatus including a local operation terminal displaying an apparatus screen of the semiconductor manufacturing apparatus and one or more remote operation terminals displaying the apparatus screen, includes: a login state management unit that manages the local operation terminal and at least one of the remote operation terminals that are logged into the same semiconductor manufacturing apparatus; and a communication unit that provides a function of posting and browsing a message between a first user operating the local operation terminal and a second user operating the at least one of the remote operation terminals that are logged into the same semiconductor manufacturing apparatus, by transmitting screen data enabling the posting and browsing of the message to the local operation terminal and the at least one of the remote operation terminals that are logged into the same semiconductor manufacturing apparatus.

The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO.sub.2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.

A method of forming an integrated circuit structure is provided. In an embodiment, the method includes bonding top dies onto a bottom wafer and then molding a first molding material onto and in between the top dies and the bottom wafer. The bottom wafer, the top dies, and the first molding material are sawed to form molding units. Each of the molding units includes one of the top dies and a bottom die sawed from the bottom wafer. The molding units are bonded onto a package substrate and a second molding material is molding onto the one of the molding units and the package substrate. Thereafter, the package substrate and the second molding material are sawed to form package-molded units.

Methods for fabricating and refurbishing an assembly are disclosed herein. The method begins by applying an adhesive layer onto a first substrate. A second substrate is placed onto the adhesive layer, thereby securing the two substrates together, the adhesive layer bounding at least one side of a channel that extends laterally between the substrates to an exterior of the assembly. And, the substrates and the adhesive layer are subjected to a bonding procedure and allowing outgassing of volatiles from the adhesive layer to escape from between the substrates through the channel, wherein the substrates bonded by the adhesive layer form a component for a semiconductor vacuum processing chamber.

The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO.sub.2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.

A method and apparatus are described for reducing particle contamination in a plasma processing chamber. In one embodiment, a pasting disk is provided which includes a disk-shaped base of high-resistivity material that has an electrically conductive pasting material layer applied to a top surface of the base so that the pasting material layer partially covers the top surface of the base. The pasting disk is sputter etched to deposit conductive pasting material over a wide area on the interior surfaces of a plasma processing chamber while minimizing deposition on dielectric components that are used to optimize the sputter etch process during substrate processing.

Methods for bonding substrates, forming assemblies using the same, along with improved methods for refurbishing said assemblies are disclosed that take advantage of at least one channel formed in an adhesive utilized to join two substrates to improve fabrication, performance and refurbishment of the assemblies. In one embodiment an assembly includes a first substrate secured to a second substrate by an adhesive layer. The assembly includes a channel having at least one side bounded by the adhesive layer and having an outlet exposed to an exterior of the assembly.

A tool useful in the manufacture of a semiconductor is disclosed. A mold is providing having an interior defining a planar capillary space. A coating substantially covers at least the planar capillary space of the graphite member. The coating is substantially non-reactive to silicon at temperatures greater than approximately 1420 degrees Centigrade.

Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a layer of integrated circuit (IC) components is received, and a second substrate with one or more adhesive areas is received. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.