Embodiments described herein may be related to apparatuses, processes, and techniques related to contactless transmission within a package that combines radiating elements with vertical transitions in the package, in particular to a waveguide within a core of the package that is surrounded by a metal ring. A radiating element on one side of the substrate core and above the waveguide surrounded by the metal ring communicates with another radiating element on the other side of the substrate core and below the waveguide surrounded by the metal ring. Other embodiments may be described and/or claimed.

A thermally conductive and electrically insulating substrate is provided. The thermally conductive and electrically insulating substrate includes a thermally conductive base, an electrically insulating layer, and one or more metal sheets. The electrically insulating layer is disposed on the thermally conductive base, and the one or more metal sheets are disposed on the electrically insulating layer. The metal sheet is allowed to have one or more chips arranged thereon, and a surface of the metal sheet where the metal sheet is allowed to be engaged with the chip is not parallel to a surface of the electrically insulating layer where the electrically insulating layer is mated with the metal sheet.

Exemplary methods of cooling a semiconductor component substrate may include heating the semiconductor component substrate to a temperature of greater than or about 500° C. in a chamber. The semiconductor component substrate may be or include aluminum. The methods may include delivering a gas into the chamber. The gas may be characterized by a temperature below or about 100° C. The methods may include cooling the semiconductor component substrate to a temperature below or about 200° C. in a first time period of less than or about 1 minute.

A substrate structure has an obtuse portion formed between a side surface and a bottom surface of a substrate body. The obtuse portion includes a plurality of turning surfaces to disperse the stress of the substrate body generated in the packaging process. Therefore, the substrate body is prevented from being cracked. A method for fabricating the substrate structure and an electronic package including the substrate structure are also provided.

An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.

Apparatus, assemblies, and platforms employing modular power voltage regulator (VR) modules to provide power to memory modules. A power VR module includes VR circuitry integrated on or coupled to a substrate with wiring coupling the VR circuitry to connector elements in first and second connector means. An assembly further includes a pair of memory modules (e.g., DDR) that are coupled to a power VR module via mating connector means. The connector means may be coupled using a Compression Mount Technology (CMT) connector disposed between arrays of CMT contact pads on the power VR module and the memory modules, or may comprise BGAs, PGAs, and LGAs. The power VR module receives one or more input voltages via one or both memory module and provide various output voltages to each of the memory modules to power memory devices and other circuitry on those modules.

To improve cooling capability, power conversion apparatus 1 that converts a direct current voltage into an alternating current voltage includes: first substrate 100 on which power conversion circuit 2 is mounted; second substrate 200 on which driving circuit 3 that drives power conversion circuit 2 is mounted; and shield plate 300 that is disposed between first substrate 100 and second substrate 200, and first substrate 100 is a metal substrate.

A first frame includes portions of a first short side surface and a first long side surface, in which a plurality of conductor layers to which a plurality of DC electrode terminals are connected, and a plurality of insulating layers arranged between the plurality of conductor layers are stacked. Further, a second frame includes portions of a second short side surface and a second long side surface.

An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.

An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.