A chip structure includes a substrate, a bottom conductive layer, a semiconductor layer, an interlayer dielectric layer, at least one electrode, and at least one top electrode. The substrate includes in order a core layer and a composite material. The bottom conductive layer is disposed on the bottom surface of the core layer, the semiconductor layer is disposed on the substrate, and an interlayer dielectric layer is disposed on the semiconductor layer. The at least one electrode is disposed between the semiconductor layer and the interlayer dielectric layer, and the at least one top electrode is disposed on the interlayer dielectric layer and electrically coupled to the at least one electrode.

A device package and a method of forming a device package are described. The device package includes a dielectric on a conductive pad, and a first via on a first seed on a top surface of the conductive pad. The device package further includes a conductive trace on the dielectric, and a second via on a second seed layer on the dielectric. The conductive trace connects to the first via and the second via, where the second via connects to an edge of the conductive trace opposite from the first via. The dielectric may include a photoimageable dielectric or a buildup film. The device package may also include a seed on the dielectric prior to the conductive trace on the dielectric, and a second dielectric on the dielectric, the conductive trace, and the first and second vias, where the second dielectric exposes a top surface of the second via.

Flexible devices including conductive traces with enhanced stretchability, and methods of making and using the same are provided. The circuit die is disposed on a flexible substrate. Electrically conductive traces are formed in channels on the flexible substrate to electrically contact with contact pads of the circuit die. A first polymer liquid flows in the channels to cover a free surface of the traces. The circuit die can also be surrounded by a curing product of a second polymer liquid.

Flexible devices including conductive traces with enhanced stretchability, and methods of making and using the same are provided. The circuit die is disposed on a flexible substrate. Electrically conductive traces are formed in channels on the flexible substrate to electrically contact with contact pads of the circuit die. A first polymer liquid flows in the channels to cover a free surface of the traces. The circuit die can also be surrounded by a curing product of a second polymer liquid.

A semiconductor module includes a base plate made of a metal, an insulating frame provided on a peripheral edge portion of the base plate, a lead made of a metal and provided on the frame, and a semiconductor device mounted on the base plate in a space surrounded by the frame, wherein the frame is fixed to the base plate by a bonding material containing silver, the frame has concave portions formed in an inner portion which is a corner portion on a space side and an outer portion which is a corner portion on a side opposite to the inner portion in a surface thereof which faces the base plate, and the concave portions are filled with a coating material.

Semiconductor packages described herein include a thermal capacitor designed to absorb transient heat pulses from a power semiconductor die and subsequently release the transient heat pulses to a surrounding environment, and/or a recessed pad feature. Corresponding methods of production are also described.

A flexible passive electronic component includes a substrate, which comprises an insulating layer and optionally an inorganic layer with an upper side and a lower side, whereby the insulating layer at least partially covers the upper side of the optional inorganic layer. The flexible passive electronic component further comprises an electrical structure at least partially covering the insulating layer. The substrate has a thickness, which is at most 500 μm. The flexible passive electronic component has a height, which is at most 150 11 μm.

A copper/ceramic bonded body includes: a copper member (12) made of copper or a copper alloy; and a ceramic member (11) made of nitrogen-containing ceramics, the copper member (12) and the ceramic member (11) being bonded to each other, in which a Mg solid solution layer in which Mg is solid-soluted in a Cu matrix is formed at a bonding interface between the copper member (12) and the ceramic member (11), an active metal nitride layer (41) containing a nitride of one or more active metals selected from Ti, Zr, Nb, and Hf is formed on a ceramic member (11) side, and a thickness of the active metal nitride layer (41) is set to be in a range of 0.05 μm or more and 1.2 μm or less.

A copper/ceramic bonded body includes: a copper member (12) made of copper or a copper alloy; and a ceramic member (11) made of nitrogen-containing ceramics, the copper member (12) and the ceramic member (11) being bonded to each other, in which a Mg solid solution layer in which Mg is solid-soluted in a Cu matrix is formed at a bonding interface between the copper member (12) and the ceramic member (11), an active metal nitride layer (41) containing a nitride of one or more active metals selected from Ti, Zr, Nb, and Hf is formed on a ceramic member (11) side, and a thickness of the active metal nitride layer (41) is set to be in a range of 0.05 μm or more and 1.2 μm or less.

An integrated circuit package comprising one or more electronic component(s); a first substrate including a first surface and a second surface of the first substrate; and a second substrate including a first surface and a second surface of the second substrate. The first substrate including a first first-substrate cavity on the first surface of the first substrate. The second substrate includes a first second-substrate cavity on the first surface of the second substrate. The second surface of the first substrate and the second surface of the second substrate is located between the first surface of the first substrate and the first surface of the second substrate; or the first surface of the first substrate and the first surface of the second substrate is located between the second surface of the first substrate and the second surface of the second substrate.