A chip mounting structure and a chip mounting device are provided. The chip mounting structure includes a circuit substrate and a plurality of micro heaters. The circuit substrate has a plurality of solder pads. A plurality of micro heaters are disposed on the circuit substrate adjacent to the solder pad. The plurality of chips are disposed on the circuit substrate, and the chip is electrically connected to the solder pad by a solder ball. Therefore, the soldering yield of the process can be reduced by the chip mounting structure and the chip mounting device.

An activable electronic component destruction device includes a heater and a heat-activated expandable material arranged on top of the heater. Heating of the heater causes the heat-activated expandable material to expand. The device further includes activation electronics coupled to the heater. The activation electronics are configured to control supply of power to the heater, which causes the heater to heat the heat-activated expandable material, which breaks a semiconductor substrate arranged on top of the heat-activated expandable material.

A three-dimensional production method for a functional element structure body according to the invention is a three-dimensional production method for a functional element structure body, which includes an electrical functional element section having a terminal and an insulating member provided on the periphery of the functional element section in a state where at least the terminal is exposed to the outside, and includes a layer formation step of forming one layer in a layer forming region by supplying a first flowable composition containing first particles for the functional element section from a first supply section, and supplying a second flowable composition containing second particles for the insulating member from a second supply section, a shaping step of shaping the functional element structure body by repeating the layer formation step, and a solidification step of performing solidification by applying energy to the first particles and the second particles in the layer.

The present invention concerns a system for allowing the restoration of an interconnection of a die of a power module, a first terminal of the interconnection being fixed on the die and a second terminal of the interconnection being connected to an electric circuit. The system comprises:at least one material located in the vicinity of the first terminal of the interconnection, the material having a predetermined melting temperature,means for controlling the temperature of the die at the predetermined melting temperature during a predetermined period of time. The present invention concerns also the method.

Circuitry to apply heat to a die while the die junction temperature is below a minimum die junction temperature of an operating die junction temperature range for the die is provided. The circuitry to avoid a system boot failure when the die junction temperature is below the operating die junction temperature range of the die.

The present invention provides a chip carrier structure including: a non-circuit substrate, a plurality of micro heaters, and an adhesive layer. The micro heaters are disposed on the non-circuit substrate. The adhesive layer is disposed on the micro heaters, and a plurality of chips are disposed on the adhesive layer. Thereby, the present invention improves the solder yield of the process by a wafer carrying structure and a wafer carrying device.

An apparatus with embedded water detection and heater includes a substrate including a number of conductive traces and a lid including multiple electrodes. Each electrode is coupled to at least one of the conductive traces through vias. A sensor is placed inside a cavity of the lid and is electrically coupled to one or more conductive traces of the substrate. A gel at least partially fills the lid and covers the sensor. The presence of water on the apparatus is detected by measuring a dielectric permittivity between at least two of the plurality of electrodes, and the electrodes can generate heat to eliminate the water.

The disclosure relates to an array substrate and a method for fabricating an array substrate. The array substrate includes a base substrate, a cover layer on the base substrate, an opening at least partially passing through the cover layer, a stress buffer structure adjacent to the opening and on a side of the cover layer facing the base substrate, wherein the stress buffer structure includes a phase change material, wherein a height of a portion of the cover layer on the phase change material is lower than a height of a portion of the cover layer adjacent to the phase change material.

An oscillator includes a board having a first surface, and provided with a housing section opening on the first surface, a resonator including a resonator element and a resonator package configured to house the resonator element, a heat generator attached to the resonator, electrically connected to the resonator package, and disposed inside the housing section, and a plurality of lead terminals connected to the board, and configured to support the resonator.

A thermal control circuit is described. The thermal control circuit includes a heating element disposed within an electronic circuit board having a semiconductor chip disposed thereon. The thermal control circuit includes a power management integrated circuit coupled to the heating element. The power management integrated circuit is to enable the heating element to heat the semiconductor chip at least to the semiconductor chips' lowest rated operating temperature prior to the semiconductor chip being placed in a fully operational state.