H01L23/40

PACKAGE SYSTEM AND MANUFACTURING METHOD THEREOF

A package system and a manufacturing method thereof are provided. The package system includes a semiconductor package and a thermal-dissipating structure. The semiconductor package includes a first surface and a second surface opposing to each other, and a planarity of the second surface is greater than that of the first surface. The thermal-dissipating structure includes a first plate secured to the semiconductor package, a gasket interposed between the first plate and the semiconductor package, a second plate secured to the semiconductor package opposite to the first plate, and a first thermal interface material layer interposed between the second plate and the second surface of the semiconductor package. The gasket includes a plurality of hollow regions corresponding to portions of the first surface of the semiconductor package.

Heat sink assembly for electronic equipment

A heat sink assembly for a cage for a field replaceable computing module includes a heat sink, a thermal interface material (TIM), and an actuation assembly. The heat sink includes a mating surface. The TIM includes a first surface that is coupled to the mating surface and a second surface that is opposite the first surface. Thus, the second surface can engage a heat transfer surface of a field replaceable computing module installed adjacent the heat sink. The actuation assembly includes a shape memory alloy (SMA) element. When the SMA element is in a first position, the second surface of the TIM contacts the heat transfer surface of the computing module. When the SMA element moves to a second position, the second surface of the TIM is moved a distance away from the heat transfer surface of the computing module.

Heat sink, heat dissipation apparatus, heat dissipation system, and communications device

One example heat sink includes a heat dissipation substrate, a connector, and a fastener. The heat dissipation substrate is configured to dissipate heat for a packaged chip located on a circuit board, and the heat dissipation substrate is located on a surface that is of the packaged chip and that is opposite to the circuit board. A first heat dissipation substrate and a second heat dissipation substrate of the heat dissipation substrate each have a heat conduction surface that conducts heat with a chip in the packaged chip. Different heat conduction surfaces correspond to different chips.

Holding and ignition prevention device for semiconductor element, and power conversion device using holding and ignition prevention device
11502018 · 2022-11-15 · ·

A problem to be solved by the present invention is to prevent smoke emission and ignition of a power semiconductor element that is installed inside a power conversion device connected to a battery in the field of power electronics, for example. A semiconductor holding device according to the present invention includes: a package which houses a power semiconductor element therein and dissipates heat to a cooler from a first surface of the package; a plate covering a second surface opposing the first surface of the package; and a pressing member pressing the plate against the package.

Holding and ignition prevention device for semiconductor element, and power conversion device using holding and ignition prevention device
11502018 · 2022-11-15 · ·

A problem to be solved by the present invention is to prevent smoke emission and ignition of a power semiconductor element that is installed inside a power conversion device connected to a battery in the field of power electronics, for example. A semiconductor holding device according to the present invention includes: a package which houses a power semiconductor element therein and dissipates heat to a cooler from a first surface of the package; a plate covering a second surface opposing the first surface of the package; and a pressing member pressing the plate against the package.

Integrated Circuit Package and Method

In an embodiment, a device includes: a package component including integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure over the encapsulant and the integrated circuit dies, and sockets over the redistribution structure; a mechanical brace physically coupled to the sockets, the mechanical brace having openings, each one of the openings exposing a respective one of the sockets; a thermal module physically and thermally coupled to the encapsulant and the integrated circuit dies; and bolts extending through the thermal module, the mechanical brace, and the package component.

SECURING POWER SEMICONDUCTOR COMPONENTS TO CURVED SURFACES

The disclosure relates to an arrangement with a power module including power semiconductor components. The arrangement further includes a component having a curved surface. The power module is arranged on the curved surface of the component and is non-positively detachably connected to the component. The disclosure also relates to a power converter with the arrangement and to a vehicle with a power converter.

Packaging method and joint technology for an electronic device
11495517 · 2022-11-08 · ·

A packaging method for power devices with optimized stacks of layers comprising different thermal expansion coefficients, the method including a stress relieving buffer technology designed to improve the thermal, electrical and mechanical contact between chips and electrodes. We disclose herein a buffer structure to provide stress relief between two layers of an electronic device, the buffer structure comprising: a plurality of discrete pillars closely packed together such that there is substantially no air gap between the plurality of conductive pillars, and wherein a height of each pillar is greater than a thickness of said pillar.

Packaging method and joint technology for an electronic device
11495517 · 2022-11-08 · ·

A packaging method for power devices with optimized stacks of layers comprising different thermal expansion coefficients, the method including a stress relieving buffer technology designed to improve the thermal, electrical and mechanical contact between chips and electrodes. We disclose herein a buffer structure to provide stress relief between two layers of an electronic device, the buffer structure comprising: a plurality of discrete pillars closely packed together such that there is substantially no air gap between the plurality of conductive pillars, and wherein a height of each pillar is greater than a thickness of said pillar.

Mechanically flexible cold plates for low power components

An assembled circuit board has a topology that defines positions, dimensions and power dissipation of components mounted to the circuit board, including a high power component and one or more low power components. A cold plate makes thermal contact to the high power component through a thermal interface material. A thermally conductive sheet overlays the circuit board and is formed to match the topology of the low power component or components. The sheet has a first portion that makes thermal contact with the cold plate and a second portion that overlays the low power component or components. The cold plate removes heat directly from the high power component and indirectly through the thermally conductive sheet from the low power component or components. The thermally conductive sheet conforms to the topology of the low power components either by preforming or by flexibility.