H01L23/44

Power semiconductor device

An object of the invention is to improve the reliability of a power semiconductor device. The power semiconductor device according to the invention includes a semiconductor element, a first terminal and a second terminal that transmit current to the semiconductor element, a first base and a second base that are disposed to face each other while interposing a part of the first terminal, a part of the second terminal, and the semiconductor element between the first base and the second base, and a sealing material that is provided in a space between the first base and the second base. The second terminal includes an intermediate portion formed in such a way that a distance from the first terminal increases along a direction away from the semiconductor element. The intermediate portion is provided between the first base and the second base and in the sealing material.

SHROUDED POWDER PATCH
20220187023 · 2022-06-16 · ·

A heat sink for use in an immersion cooling system that includes a sintered powder structure enclosed in a porous enclosure. The porous enclosure has openings, e.g., formed by a mesh, with a size to help contain sintered powder particles that may be dislodged during operation of the heat sink.

CIRCUIT BOARD HAVING A COOLING AREA ABOVE AND BELOW A SEMICONDUCTOR CHIP
20220183147 · 2022-06-09 ·

A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.

CIRCUIT BOARD HAVING A COOLING AREA ABOVE AND BELOW A SEMICONDUCTOR CHIP
20220183147 · 2022-06-09 ·

A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.

Cooling device for cooling a power component
11355284 · 2022-06-07 · ·

The invention relates to a cooling device for cooling a power component, the cooling device having a one-piece cooling housing with a base, a first end face, a second end face, a first lateral face, and a second lateral face, which define a receiving area for receiving the power component. The cooling device further includes an inlet for supplying a cooling medium, an outlet for discharging a cooling medium, a first cooling channel, a second cooling channel, a third cooling channel, and a fourth cooling channel. The first cooling channel is arranged on the first end face, the second cooling channel is arranged on the second end face, the third cooling channel is arranged on the first lateral face, the fourth cooling channel is arranged on the second lateral face, and the first and the second cooling channel are each fluidically connected to the third and fourth cooling channel.

Cooling system for power conversion device

A cooling system for a power conversion device may include a cooler upper-part having a plurality of cooling tubes through which cooling water flows and a connecting portion connecting the cooling tubes; one or more power conversion modules mounted between the cooling tubes; a cooling fin plate formed in a plate shape with cooling fins on a side and mounted on a side of the power conversion module such that the cooling fins are mounted in the opposite directions with respect to the power conversion module; and a cooler lower-part mounted between the cooling fin plate and the cooler upper-part, having one or more open holes formed at a portion, and combined with the cooling fin plate by inserting the cooling fins of the cooling fin plate in the open holes.

Scalable thermal ride-through for immersion-cooled server systems

A thermal management system for a computing device includes an immersion tank with a cooling fluid therein, a computing device positioned in the cooling fluid in the immersion tank, and a thermal block positioned in the cooling fluid in the immersion tank. The computing device heats the cooling fluid, and the thermal block is configured to receive heat from the cooling fluid. The thermal block includes a fluid management feature to direct flow of the cooling fluid relative to the thermal block and computing device.

System and method for transferring thermal energy from integrated circuits

There is disclosed a system and method for transferring waste heat from integrated circuits. In an embodiment, the system comprises: a self-contained enclosure having integrated circuits therein, the self-contained enclosure further including: a first fluid circuit configured for removing waste heat from the integrated circuits; an inlet for connection from an external water tank and an outlet for connection to the external water tank, that when connected with the external water tank forms a second fluid circuit; a heat exchanger operatively connected to the first fluid circuit and the second fluid circuit, and configured to transfer thermal energy therebetween; and a control for regulating a temperature gradient and a flow rate in each of the first and second fluid circuits, such that both a desired integrated circuit operating temperature and a desired water tank temperature is achieved. A plurality of self-contained enclosures co-located with water tanks may form nodes of a distributed computing and heating network.

TWO-PHASE IMMERSION-TYPE HEAT DISSIPATION STRUCTURE
20230266076 · 2023-08-24 ·

A two-phase immersion heat dissipation structure is provided. The two-phase immersion heat dissipation structure includes an immersion-type heat dissipation substrate, a fin assembly, and a metal reinforcement frame. The immersion-type heat dissipation substrate has an upper surface having the fin assembly arranged vertically thereon and a lower surface used for contacting a heat generating element. The metal reinforcement frame is surroundingly in contact with a peripheral wall of the immersion-type heat dissipation substrate, and the metal reinforcement frame has two reinforcement side walls correspondingly protruding from a surface thereof. The two reinforcement side walls are arranged opposite to each other, and a height of the reinforcement side wall is between 5 mm and 15 mm. Each of the two reinforcement side walls has a plurality of through holes that horizontally pass through the reinforcement side wall and that are used for a replenishment of a two-phase coolant.

SEMICONDUCTOR DEVICE COMPRISING A STACK OF CHIPS, AND CHIPS FOR SUCH A STACK
20230260968 · 2023-08-17 ·

The invention relates to a semiconductor device (1) comprising a stack of chips (C1; C) arranged in successive levels along a stacking direction, each chip extending in a main plane perpendicular to the stacking direction. The stack (E) comprises a plurality of chips (C1) of a first type comprising a first portion (P1) and a second portion (P2) each extending in the main plane, the first portion (P1) being liable to release more heat than the second portion (P2) when the chip is operating. Each chip of the first type (C1) is arranged in mechanical contact with a chip in an adjacent level of the stack (E) by way of a stacking surface that extends only over its second portion (P2), such that its first portion (P1) forms a projecting part able to be exposed to a cooling fluid.