Examples of an electronic component device includes a housing formed of a member that causes radiation to lose its energy by generating an electric charge when the housing is subjected to the radiation and an electronic component housed in the housing. The member is a semiconductor device member having a PN junction.

A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

A semiconductor component includes a substrate including a plurality of source/drain implants in the form of rows and a charge storage structure disposed over the substrate. The charge storage structure includes at least three continuous layers including a first silicon oxide layer, a silicon nitride layer disposed on the first silicon oxide layer, and a second silicon oxide layer disposed on the silicon nitride layer. The semiconductor component further includes a plurality of gate structures in the form of columns disposed over the charge structure and extending perpendicular to the rows and further includes a radiation protection layer disposed over the charge storage structure and the plurality of gate structures. The radiation protection layer includes a radiation resistant material including boron having an isotope composition of at least 90% boron-11.

A semiconductor component includes a substrate including a plurality of source/drain implants in the form of rows and a charge storage structure disposed over the substrate. The charge storage structure includes at least three continuous layers including a first silicon oxide layer, a silicon nitride layer disposed on the first silicon oxide layer, and a second silicon oxide layer disposed on the silicon nitride layer. The semiconductor component further includes a plurality of gate structures in the form of columns disposed over the charge structure and extending perpendicular to the rows and further includes a radiation protection layer disposed over the charge storage structure and the plurality of gate structures. The radiation protection layer includes a radiation resistant material including boron having an isotope composition of at least 90% boron-11.

A semiconductor device according to the present embodiment includes a wiring substrate. A semiconductor chip includes a semiconductor substrate having a first face and a second face on the opposite side to the first face, and an SRAM on the side of the first face, and is stuck to the wiring substrate on the side of the second face. The semiconductor chip includes a first metallic layer provided in the semiconductor substrate between the SRAM and the wiring substrate.

In a semiconductor device, a first interposer has a first main surface. A second interposer is disposed on the first main surface. The second interposer has a second main surface on a side opposite to the first interposer. A material of the second interposer is different from that of the first interposer. A first semiconductor chip has a first front surface. The first semiconductor chip is mounted on the second main surface through a plurality of bump electrodes with the first front surface facing the second main surface. The first semiconductor chip includes a volatile memory circuit. A second semiconductor chip is mounted on a plurality of electrode patterns disposed on the first main surface or the second main surface through a plurality of bonding wires. The second interposer overlaps the first semiconductor chip in a direction perpendicular to the first main surface.

A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

An integrated circuit package with a buffer providing radiation protection to memory elements and components is described. The integrated circuit packages and the incorporated buffers provide a protective distance between potential sources of internal radiation particles within the integrated circuit package and any memory elements/components which may be sensitive to radiation such as alpha particles. This protective distance allows for the integrated circuit packages to be completed or assembled without needing added more expensive or redundant memory components.