An IC includes a substrate including metal levels thereon including a top and bottom metal level with at least a transmit (Tx) circuit and receive (Rx) circuit each having 1 isolation capacitor and an inductor. A scribe seal around the IC includes a first portion around the Tx circuit and second portion around the Rx circuit, utilizing 2 of the metal levels including at least an outer metal stack. The Tx and Rx circuits are side-by-side along a direction that defines a length for the scribe seal. The outer metal stack includes a neck region between the scribe seal portions including a shorting structure including metal level(s) for shorting together the outer metal stack of the scribe seal portions. An optional routing pass-through isolated from the shorting structure includes other metal layers connecting through the neck region between node(s) within the first and second scribe seal portion.

A display device includes a display panel and a first protective substrate positioned under the display panel and including a first sub-region and a second sub-region positioned at a side of the first sub-region. A thickness of the first protective substrate in the first sub-region is greater than a thickness of the first protective substrate in the second sub-region.

An integrated circuit (IC) includes a capacitor array in at least one first back-end-of-line (BEOL) interconnect level. The capacitor array includes a pair of capacitor manifolds coupled to parallel capacitor routing traces and capacitors coupled between each pair of parallel capacitor routing traces. The IC also includes an inductor trace having at least one turn in at least one second BEOL interconnect level. The inductor trace defines a perimeter to overlap at least a portion of the capacitor array.

A semiconductor device includes passive electrical components in a substrate; and an interconnect structure over the passive electrical components, conductive features of the interconnect structure being electrically coupled to the passive electrical components. The conductive features of the interconnect structure includes a first conductive line over the substrate; a conductive bump over the first conductive line, where in a plan view, the conductive bumps has a first elongated shape and is entirely disposed within boundaries of the first conductive line; and a first via between the first conductive line and the conductive bump, the first via electrically connected to the first conductive line and the conductive bump, where in the plan view, the first via has a second elongated shape and is entirely disposed within boundaries of the conductive bump.

A deep trench capacitor having a high capacity is formed into a deep trench having faceted sidewall surfaces. The deep trench is located in a bulk silicon substrate that contains an upper region of undoped silicon and a lower region of n-doped silicon. The lower region of the bulk silicon substrate includes alternating regions of n-doped silicon that have a first boron concentration (i.e., boron deficient regions), and regions of n-doped silicon that have a second boron concentration which is greater than the first boron concentration (i.e., boron rich regions).

An ultralong time constant time measurement device includes elementary capacitive elements that are connected in series. Each elementary capacitive element is formed by a stack of a first conductive region, a dielectric layer having a thickness suited for allowing charge to flow by direct tunneling effect, and a second conductive region. The first conductive region is housed in a trench extending from a front face of a semiconductor substrate down into the semiconductor substrate. The dielectric layer rests on the first face of the semiconductor substrate and in particular on a portion of the first conductive region in the trench. The second conductive region rests on the dielectric layer.

Co-fired integrated circuit devices and methods for fabricating and integrating such on a workpiece are disclosed herein. An exemplary method includes forming a first passive device and a second passive device over a carrier substrate. The first passive device and the second passive device each include at least one material layer that includes a co-fired ceramic material. The carrier substrate is removed after performing a co-firing process to cause chemical changes in the co-fired ceramic material. The first passive device may include a conductive loop disposed between a first magnetic layer and a second magnetic layer. The first magnetic layer, the second magnetic layer, or both includes a co-fired ceramic magnetic material. The second passive device may include a first conductive layer and a second conductive layer separated by a dielectric layer. The first conductive layer, the second conductive layer, or both includes a co-fired ceramic conductive material.

A display apparatus including: a substrate including a first area, a second area, and a bending area between the first area and the second area, the substrate being bent with respect to a bending axis extending in a first direction; a display disposed on the first area of the substrate; a panel driver disposed on the second area of the substrate; and a functional film disposed on the second area and the bending area of the substrate, the functional film covering the panel driver and extending to the bending area.

Co-fired integrated circuit devices and methods for fabricating and integrating such on a workpiece are disclosed herein. An exemplary method includes forming a first passive device and a second passive device over a carrier substrate. The first passive device and the second passive device each include at least one material layer that includes a co-fired ceramic material. The carrier substrate is removed after performing a co-firing process to cause chemical changes in the co-fired ceramic material. The first passive device may include a conductive loop disposed between a first magnetic layer and a second magnetic layer. The first magnetic layer, the second magnetic layer, or both includes a co-fired ceramic magnetic material. The second passive device may include a first conductive layer and a second conductive layer separated by a dielectric layer. The first conductive layer, the second conductive layer, or both includes a co-fired ceramic conductive material.

A display device includes a display panel and a first protective substrate positioned under the display panel and including a first sub-region and a second sub-region positioned at a side of the first sub-region. A thickness of the first protective substrate in the first sub-region is greater than a thickness of the first protective substrate in the second sub-region.