A thin film resistor (TFR) module includes a metal cup structure, a dielectric liner region, a TFR element, and a pair of TFR heads electrically connected to the TFR element. The metal cup structure includes a laterally-extending metal cup base and multiple metal cup sidewalls extending upwardly from the laterally-extending metal cup base. The dielectric liner region is formed in an opening defined by the metal cup structure. The TFR element is formed in an opening defined by the dielectric liner region, wherein the TFR element is insulated from the metal cup structure by the dielectric liner region.

A system-on-chip may include an inductor-capacitor oscillator monolithically integrated into the system-on-chip The inductor-capacitor oscillator may be configured to improve frequency stability and reduce noise when compared to a resistor-capacitor oscillator. Methods of making integrated oscillators may involve forming an inductor at least partially while forming a BEOL structure on a substrate. A capacitor supported on and/or embedded within the semiconductor material of the substrate may be formed before or while forming the BEOL structure. The inductor may be connected to the capacitor in parallel at least partially utilizing the BEOL structure to form an integrated inductor-capacitor oscillator.

A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; a second electrode layer contacting the dielectric film without contacting the metal foil; and an insulating member separating the first and second electrode layers. The insulating member has a tapered shape in cross section. With the above configuration, both the first and second electrode layers can be disposed on the upper surface of the metal foil. In addition, since the insulating member has a tapered shape in cross section, adhesion performance of the insulating member can be enhanced, thus making it possible to prevent short-circuit between the first and second electrode layers.

To provide a thin film capacitor in which warpage is less likely to occur. A thin film capacitor includes: a metal foil having roughened upper and lower surfaces; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a dielectric film covering the lower surface of the metal foil and made of a dielectric material having a thermal expansion coefficient smaller than that of the metal foil; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the first dielectric film without contacting the metal foil. The lower surface of the metal foil is thus covered with the dielectric film having a small thermal expansion coefficient, thereby making it possible to prevent the occurrence of warpage.

A moat trench laterally surrounding a device region is formed in a substrate. A conductive metallic substrate enclosure structure is formed in the moat trench. Deep trenches are formed in the substrate, and a trench capacitor structure is formed in the deep trenches. The substrate may be thinned by removing a backside portion of the substrate. A backside surface of the conductive metallic substrate enclosure structure is physically exposed. A backside metal layer is formed on a backside surface of the substrate and a backside surface of the conductive metallic substrate enclosure structure. A metallic interconnect enclosure structure and a metallic cap plate may be formed to provide a metallic shield structure configured to block electromagnetic radiation from impinging into the trench capacitor structure.

To provide a thin film capacitor having high adhesion performance with respect to a circuit substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The first and second electrode layers are formed in an area surrounded by an outer peripheral area of the upper surface of the metal foil so as not to cover the outer peripheral area. The outer peripheral area of the roughened upper surface of the metal foil is thus exposed, so that adhesion performance with respect to a circuit substrate can be enhanced.

To provide a thin film capacitor in which a pair of terminal electrodes can be disposed on the same plane. A thin film capacitor includes a metal foil having a roughened upper surface, a dielectric film covering the upper surface of the metal foil and having an opening for partly exposing the metal foil therethrough, a first electrode layer contacting the metal foil through the opening, and a second electrode layer contacting the dielectric film without contacting the metal foil. With this configuration, both the first and second electrode layers can be disposed on the upper surface of the metal foil. In addition, since the metal foil is surface-roughened, a larger capacitance can be obtained.

To provide a thin film capacitor having high flexibility. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The particle diameter of crystal at a non-roughened center part of the metal foil is less than 15 μm in the planar direction and less than 5 μm in the thickness direction. This can not only enhance the flexibility of the metal foil to reduce a short-circuit failure in a state where the thin film capacitor is incorporated in a multilayer substrate but also enhance positional accuracy.

This semiconductor device is provided with: a high-voltage die pad and a low-voltage die pad, which are insulated from each other; a resistive element which is mounted on the high-voltage die pad; and a semiconductor element which is mounted on the low-voltage die pad. The resistive element is provided with: a substrate which is mounted on the high-voltage die pad; an insulating layer which is formed on the substrate; and a thin film resistive layer which is formed on the insulating layer.

A semiconductor device is disposed below an inductor. The semiconductor device includes a metal-oxide-semiconductor capacitor structure and a patterned shielding structure. The metal-oxide-semiconductor capacitor structure includes a polysilicon layer, an oxide definition layer, and a first metal layer. The first metal layer is connected to the polysilicon layer and the oxide definition layer. The patterned shielding structure is disposed over the metal-oxide-semiconductor capacitor structure and includes a second metal layer.