A pixel structure and a manufacturing method therefor, an array substrate, and a display device are provided. The pixel structure includes a pixel electrode, an active layer, a source/drain electrode layer, and a common electrode which are located on a base substrate. The pixel electrode is located between the base substrate and the common electrode. The source/drain electrode layer includes a first electrode and a second electrode which are electrically connected to the active layer, and the second electrode is electrically connected to the pixel electrode. The active layer is located between the base substrate and the source/drain electrode layer. The active layer includes a first surface close to the source/drain electrode layer. The source/drain electrode layer includes a second surface close to the active layer. Partial edge of the first surface is aligned with partial edge of the second surface.

A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

An array substrate includes a substrate, a protection layer, and a photodiode. The protection layer is disposed over the substrate, has a single layer-structure, and is provided with a through-hole therein. The photodiode includes a lower electrode, a PN junction and an upper electrode, which are sequentially over the substrate. The PN junction is within the through-hole. The protection layer and the PN junction of the photodiode have a substantially same thickness. The array substrate further includes a thin-film transistor over the substrate. An orthographic projection of an active layer of the thin-film transistor on the substrate does not overlap with an orthographic projection of the PN junction of the photodiode on the substrate.

A display device includes: a display area including a plurality of pixels; a first peripheral area disposed at one side of the display area; and a second peripheral area disposed at the opposite side of the display area, wherein a first column spacer is disposed in the display area, a second column spacer is disposed in the first peripheral area, and a third column spacer is disposed in the second peripheral area. The patterns of an exposure mask utilized in the first peripheral area in which the second column spacer is disposed and the second peripheral area in which the third column spacer is disposed may be different from each other.

An electronic device for storing, controlling and manipulating electron or hole spin based semiconductor qubits, the device including an electrically insulating layer and on a front face of the insulating layer, a trapping structure for electrons or holes which includes: a channel portion including at least one layer portion of semiconductor material, as well as a plurality of gates distributed for trapping at least one electron or hole in the channel portion, and on the back side of the insulating layer, an electrical track extending parallel to the insulating layer, for generating an oscillating magnetic field acting on the at least one electron or hole trapped in the trapping structure.

An electronic device for storing, controlling and manipulating electron or hole spin based semiconductor qubits, the device including an electrically insulating layer and on a front face of the insulating layer, a trapping structure for electrons or holes which includes: a channel portion including at least one layer portion of semiconductor material, as well as a plurality of gates distributed for trapping at least one electron or hole in the channel portion, and on the back side of the insulating layer, an electrical track extending parallel to the insulating layer, for generating an oscillating magnetic field acting on the at least one electron or hole trapped in the trapping structure.

A display backplane is provided, including a base, wherein pixel circuits, bonding electrodes, and bonding connection wires are on the base; the bonding electrodes are coupled to the bonding connection wires in a one-to-one correspondence; the bonding electrodes and the bonding connection wires are on two opposite surfaces of the base; the pixel circuits and the bonding connection wires are on a same side of the base; one end of each bonding connection wire is coupled to the bonding electrode through the first via in the base; the other end of each of at least some bonding connection wires is coupled to the pixel circuit; and an orthographic projection of at least one of the bonding electrodes and the bonding connection wires on the base is not coincident with an orthographic projection of the pixel circuit on the base.

An array substrate includes: a first substrate; a plurality of gate lines and a plurality of data lines; a plurality of thin film transistors; and a plurality of reflective electrodes. The plurality of gate lines and the plurality of data lines define a plurality of sub-pixel regions. A thin film transistor is located in a sub-pixel region. A reflective electrode is located in the sub-pixel region and electrically connected to the thin film transistor in the same sub-pixel region. Each reflective electrode has a border including a plurality of first sub-borders extending in a first direction, a plurality of second sub-borders extending in a second direction, and a plurality of chamfer borders each connecting a first sub-border and a second sub-border that are adjacent; and an intersection of extension lines of the first sub-border and the second sub-border is located outside the border of the reflective electrode.

The present disclosure provides an array substrate and a display device. The array substrate includes one start data line, N−1 intermediate data line and one end data line. The array substrate further includes a first driving circuit and a second driving circuit, the first driving circuit is arranged at a first side of the plurality of data lines, and the second driving circuit is arranged at a second side of the plurality of data lines opposite to the first side in a first direction. The first driving circuit is electrically connected to the first end of each of the plurality of data lines. The first driving circuit is electrically coupled to first ends of the plurality of data lines, a first end of the end data line is electrically coupled to a first end of the start data line, and the second driving circuit is electrically coupled to second ends of the plurality of data lines.

A display substrate, a method of manufacturing the display substrate, and a display device are provided. The display substrate includes: a base substrate, a plurality of sub-pixels, a gate driving circuit, a plurality of input contact pads, a plurality of output contact pads and a contact pad insulating layer. Surfaces of the input contact pads away from the base substrate and surfaces of the output contact pads away from the base substrate are exposed from the contact pad insulating layer. The contact pad insulating layer includes a first portion having a first thickness and a second portion having a second thickness smaller than the first thickness. Edges of the input contact pads and edges of the output contact pads are covered by the first portion. The second portion is located in the region between the input contact pads and the output contact pads.