Patent classifications
H01L27/142
HIGH VOLTAGE GENERATION USING RECONFIGURABLE PHOTODIODES IN PIXEL ARRAY
An imaging sensor includes a pixel array containing photodiodes, the photodiodes being isolated from one another by full thickness deep trench isolations. Row control circuitry controls which rows of the pixel array operate in an imaging mode and which rows of the pixel array operate in an energy harvesting mode, on a row-by-row basis. Switch circuitry selectively connects different groups of photodiodes in rows operating in the energy harvesting mode into forward biased series configurations between a voltage output line and a ground line, or into forward biased parallel configurations between the voltage output line and the ground line. In the forward biased series configurations, the cathode of at least one photodiode of a given group of photodiodes is directly electrically connected to ground.
HIGH VOLTAGE GENERATION USING RECONFIGURABLE PHOTODIODES IN PIXEL ARRAY
An imaging sensor includes a pixel array containing photodiodes, the photodiodes being isolated from one another by full thickness deep trench isolations. Row control circuitry controls which rows of the pixel array operate in an imaging mode and which rows of the pixel array operate in an energy harvesting mode, on a row-by-row basis. Switch circuitry selectively connects different groups of photodiodes in rows operating in the energy harvesting mode into forward biased series configurations between a voltage output line and a ground line, or into forward biased parallel configurations between the voltage output line and the ground line. In the forward biased series configurations, the cathode of at least one photodiode of a given group of photodiodes is directly electrically connected to ground.
DEVICE INTEGRATION USING CARRIER WAFER
Compound semiconductor and silicon-based structures are epitaxially formed on semiconductor substrates and transferred to a carrier substrate. The transferred structures can be used to form discrete photovoltaic and light-emitting devices on the carrier substrate. Silicon-containing layers grown on doped donor semiconductor substrates and compound semiconductor layers grown on off-cut semiconductor substrates form elements of the devices. The carrier substrates may be electrically insulating substrates or include electrically insulating layers to which photovoltaic and/or light-emitting structures are bonded.
Image sensors
Image sensors are provided. The image sensor may include a substrate including a first surface and a second surface opposite the first surface, a photoelectric conversion layer in the substrate, and a lower capacitor connection pattern on the first surface of the substrate. The second surface of the substrate may be configured to receive incident light. The lower capacitor connection pattern may include a capacitor region and a landing region protruding from the capacitor region. The image sensors may also include a capacitor structure including a first conductive pattern, a dielectric pattern, and a second conductive pattern sequentially stacked on the capacitor region, a first wire on the capacitor structure and connected to the second conductive pattern, and a second wire connected to the landing region. The first conductive pattern may be connected to the lower capacitor connection pattern. A surface of the first wire facing the substrate and a surface of the second wire facing the substrate may be coplanar.
Image sensors
Image sensors are provided. The image sensor may include a substrate including a first surface and a second surface opposite the first surface, a photoelectric conversion layer in the substrate, and a lower capacitor connection pattern on the first surface of the substrate. The second surface of the substrate may be configured to receive incident light. The lower capacitor connection pattern may include a capacitor region and a landing region protruding from the capacitor region. The image sensors may also include a capacitor structure including a first conductive pattern, a dielectric pattern, and a second conductive pattern sequentially stacked on the capacitor region, a first wire on the capacitor structure and connected to the second conductive pattern, and a second wire connected to the landing region. The first conductive pattern may be connected to the lower capacitor connection pattern. A surface of the first wire facing the substrate and a surface of the second wire facing the substrate may be coplanar.
VERTICAL SILICON AND III-V PHOTOVOLTAICS INTEGRATION WITH SILICON ELECTRONICS
A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.
MULTI-LAYER DEVICE INCLUDING A LIGHT-TRANSMISSIVE ELECTRODE LAYER COMPRISING A POROUS MESH OR POROUS SPHERES
A multi-laver device and its method of manufacture are disclosed. The multi-layer device comprises a first electrode layer, a first repair layer, a functional layer, and a second electrode layer. The first repair layer comprises a conductive hydrogel film or conductive hydrogel beads, the conductive hydrogel film or the conductive hydrogel beads comprising conductive filler particles dispersed in a cross-linked polymer. The repair layer protects the multi-layer device from electrical short circuits. A multilayer device is also disclosed including a light-transmissive electrode layer comprising a porous mesh or porous spheres.
SOLAR CELL MODULE, ELECTRONIC DEVICE, AND POWER SUPPLY MODULE
A solar cell module includes a first substrate and a plurality of photoelectric conversion elements disposed on the first substrate. Each of the plurality of photoelectric conversion elements includes a first electrode, an electron transport layer, a perovskite layer, a hole transport layer, and a second electrode. In at least two of the photoelectric conversion elements adjacent to each other, the hole transport layers are extended continuous layers; and the first electrodes, the electron transport layers, and the perovskite layers in the at least two of the photoelectric conversion elements adjacent to each other are separated by the hole transport layer. The hole transport layer includes, as hole transport material, a polymer having a weight average molecular weight of 2,000 or more or a compound having a molecular weight of 2,000 or more.
SOLAR CELL MODULE, ELECTRONIC DEVICE, AND POWER SUPPLY MODULE
A solar cell module includes a first substrate and a plurality of photoelectric conversion elements disposed on the first substrate. Each of the plurality of photoelectric conversion elements includes a first electrode, an electron transport layer, a perovskite layer, a hole transport layer, and a second electrode. In at least two of the photoelectric conversion elements adjacent to each other, the hole transport layers are extended continuous layers; and the first electrodes, the electron transport layers, and the perovskite layers in the at least two of the photoelectric conversion elements adjacent to each other are separated by the hole transport layer. The hole transport layer includes, as hole transport material, a polymer having a weight average molecular weight of 2,000 or more or a compound having a molecular weight of 2,000 or more.
Self-sufficient chip with photovoltaic power supply on back of wafer
After forming a doped semiconductor layer on a backside of a semiconductor substrate that has a conductivity type opposite a conductivity type of the doped semiconductor layer so as to provide a p-n junction for a photovoltaic cell, transistors are formed in a front side of the semiconductor substrate. The photovoltaic cell is then electrically connected to the transistors from the front side of the semiconductor substrate using through-dielectric (TDV) via structures embedded in the semiconductor substrate.