The present invention relates to a structure of a solar cell for improving photoelectric conversion efficiency of the solar cell, and a manufacturing method therefor. One aspect of the solar cell according to the present invention relates to a solar cell having a light-absorbing layer formed between two electrodes arranged to face each other, wherein an electrical polarization layer comprising an electrical polarization material forming an inner electrical field is formed between the electrodes and the light-absorbing layer.

According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.

A photovoltaic generation system includes: a solar cell array formed with one or more solar cell modules; and a power conditioner, wherein each of the solar cell modules includes one or more solar cells, the photovoltaic generation system further has a first conductive wire connected to a conductor parts which is provided at each of the solar cell modules and which is insulated from the solar cells, and a constant voltage power supply whose one end is connected to the first conductive wire, and a potential is supplied to the conductor parts by the constant voltage power supply. As a result, the photovoltaic generation system which can suppress degradation of solar cell characteristics due to PID while suppressing increase in manufacturing cost of the solar cell module is provided.

A photovoltaic generation system includes: a solar cell array formed with one or more solar cell modules; and a power conditioner, wherein each of the solar cell modules includes one or more solar cells, the photovoltaic generation system further has a first conductive wire connected to a conductor parts which is provided at each of the solar cell modules and which is insulated from the solar cells, and a constant voltage power supply whose one end is connected to the first conductive wire, and a potential is supplied to the conductor parts by the constant voltage power supply. As a result, the photovoltaic generation system which can suppress degradation of solar cell characteristics due to PID while suppressing increase in manufacturing cost of the solar cell module is provided.

Structures and methods for electron-hole photogeneration by plasmonic multiple exciton generation in light absorbing layers and solar cells are disclosed.

Structures and methods for electron-hole photogeneration by plasmonic multiple exciton generation in light absorbing layers and solar cells are disclosed.

The present disclosure relates to the field of semiconductor Integrated Circuit (IC) manufacture, and provides an InGaAs-based double-gate PMOS Field Effect Transistor (FET). The FET includes a bottom gate electrode, a bottom gate dielectric layer, a bottom gate interface control layer, an InGaAs channel layer, an upper interface control layer, a highly doped P-type GaAs layer, an ohmic contact layer, source/drain metal electrodes, a top gate dielectric layer and a top gate electrode. The source/drain metal electrodes are located on opposite sides of the ohmic contact layer. A gate trench structure is etched to an upper surface of the interface control layer between the source and drain metal electrodes. The top gate dielectric layer uniformly covers an inner surface of the gate trench structure, and the top gate electrode is provided on the top gate dielectric layer. The present disclosure provides a PMOS FET with better gate control functionality and a low interface density with the double-gate structure and interface control layer design, in order to meet the requirements of high-performance PMOS transistors.

The present invention provides a method of manufacturing a solar cell, the method including: a process of forming a first semiconductor layer on an upper surface of a semiconductor wafer and forming a second semiconductor layer, having a polarity different from a polarity of the first semiconductor layer, on a lower surface of the semiconductor wafer; a process of forming a first transparent conductive layer on an upper surface of the first semiconductor layer to externally expose a portion of the first semiconductor layer and forming a second transparent conductive layer on a lower surface of the second semiconductor layer to externally expose a portion of the second semiconductor layer; and a plasma treatment process on at least one of the first transparent conductive layer and the second transparent conductive layer, wherein the plasma treatment process includes a process of removing the externally exposed portion of the first semiconductor layer and the externally exposed portion of the second semiconductor layer.

Some embodiments include apparatus and methods for using a switch to couple an inductor to an energy harvester for a time interval to allow charging of the inductor during the time interval, and using a circuit to generate control information for power management. A value of the control information is based on a value of the time interval.

Some embodiments include apparatus and methods for using a switch to couple an inductor to an energy harvester for a time interval to allow charging of the inductor during the time interval, and using a circuit to generate control information for power management. A value of the control information is based on a value of the time interval.