Patent classifications
H01L31/1892
Photonic detector coupled with a dielectric resonator antenna
An apparatus for light detection includes a light, or photon, detector assembly and a dielectric resonator layer coupled to the detector assembly. The dielectric resonator layer is configured to receive transmission of incident light that is directed into the detector assembly by the dielectric resonator layer. The dielectric resonator layer resonates with a range of wavelengths of the incident light.
Electronic device and fabrication method thereof
An electronic device and a fabrication method thereof are provided. The electronic device includes a circuit structure layer, a package structure, an electronic element, and a plurality of function elements. The circuit structure layer has a first side and a second side opposite to the first side. The package structure is disposed on the first side of the circuit structure layer. The electronic element is embedded or encapsulated in the package structure. The function elements are disposed on the second side of the circuit structure layer. The function elements are electrically connected to the electronic element through the circuit structure layer. The electronic device provided by the disclosure exhibits borderless design or has a large function region.
Multilevel semiconductor device and structure with oxide bonding
A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the integrated circuits include at least one processor, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.
Semiconductor structure having group III-V device on group IV substrate and contacts with liner stacks
A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group III-V device can be optically and/or electrically connected to group IV devices in the group IV substrate.
PROCESS FOR FABRICATING A DETECTING DEVICE THE GETTER OF WHICH IS BETTER PROTECTED
A process for fabricating a detecting device includes producing a getter pad based on amorphous carbon resting on a mineral sacrificial layer that covers a thermal detector and producing a thin encapsulating layer that rests on the mineral sacrificial layer and that covers an upper face and sidewalls of the getter pad. The mineral sacrificial layer is removed via a first chemical etch, and a protective segment of the getter pad is removed via a second chemical etch.
Optical Receiving Device and Manufacturing Method Therefor
A light reception device of the present invention includes a first i-type cladding region, an n-type waveguide core having a predetermined width, and a second i-type cladding region in contact with a side surface of the n-type waveguide core on a substrate, includes a p-type absorption layer, a p-type diffusion barrier layer, a p-type contact layer, and a p-type electrode formed in an upper part above a region including a part of the n-type waveguide core, with an i-type insertion layer interposed between the upper part and the region, and includes an n-type electrode on an upper surface of another part of the n-type waveguide core.
CONTROL OF SURFACE MORPHOLOGY OF SPALLED (110) III-V SUBSTRATE SURFACES
The present disclosure relates to a composition that includes a III-V planar substrate having a surface aligned with and parallel to a reference plane, where the surface includes a plurality of terraces, each terrace includes a first surface positioned between a first boundary and a second boundary, each boundary is substantially parallel to the other boundaries and positioned substantially parallel to the reference plane, and each terrace is separated from an adjacent terrace by a second surface positioned between the second boundary of the terrace and the first boundary of the adjacent terrace.
METHOD AND CARRIER ELEMENT FOR PRODUCING A WAFER LAYER
A method for producing a wafer layer, including the method steps of: A) providing a carrier element; B) making the carrier element porous on at least one surface in order to produce a separating layer; C) applying a wafer layer to the separating layer of the carrier element by epitaxy; and D) detaching the wafer layer from the carrier element, with method steps B to D being repeated at least once, preferably multiple times, with the carrier element. The method step A includes the additional method steps of: A1) providing a carrier substrate; and A2) applying a seed layer to at least one surface and at least one lateral face of the carrier substrate by epitaxy in order to produce the carrier element. A carrier element for producing a wafer layer and an intermediate product are also provided.
POWER PHOTODIODE STRUCTURES, METHODS OF MAKING, AND METHODS OF USE
According to the present disclosure, techniques related to manufacturing and applications of power photodiode structures and devices based on group-III metal nitride and gallium-based substrates are provided. More specifically, embodiments of the disclosure include techniques for fabricating photodiode devices comprising one or more of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, structures and devices. Such structures or devices can be used for a variety of applications including optoelectronic devices, photodiodes, power-over-fiber receivers, and others.
Optical Receiving Element and Manufacturing Method Therefor
A first n-type contact layer, a second n-type contact layer, a multiplication layer, an electric field control layer, a light absorbing layer, and a p-type contact layer are layered in this order on a substrate. The second n-type contact layer is formed between the first n-type contact layer and the light absorbing layer, is made to have an area smaller than that of the light absorbing layer in a plan view, and is disposed inside the light absorbing layer in a plan view.