A compound-semiconductor photovoltaic cell includes a first photoelectric conversion cell made of a first compound-semiconductor material which lattice matches with GaAs or Ge; a first tunnel junction layer arranged on a deep side farther than the first photoelectric conversion cell in a light incident direction, and including a first p-type (Al.sub.x1Ga.sub.1-x1).sub.y1In.sub.1-y1As (0≤x1<1, 0<y1≤1) layer and a first n-type (Al.sub.x2Ga.sub.1-x2).sub.y2In.sub.1-y2P (0≤x2<1, 0<y2<1) layer; and a second photoelectric conversion cell arranged on a deep side farther than the first tunnel junction layer in the light incident direction, and made of a second compound-semiconductor material which is a GaAs-based semiconductor material. The first photoelectric conversion cell and the second photoelectric conversion cell are joined via the first tunnel junction layer, and a lattice constant of the first n-type (Al.sub.x2Ga.sub.1-x2).sub.y2In.sub.1-y2P layer is greater than a lattice constant of the first photoelectric conversion cell.

An embodiment includes a method of texturing a semiconductor substrate, a semiconductor substrate manufactured using the method, and a solar cell including the semiconductor substrate, the method including: forming metal nanoparticles on a semiconductor substrate, primarily etching the semiconductor substrate, removing the metal nanoparticles, and secondarily etching the primarily etched semiconductor substrate to form nanostructures.

A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group device can be optically and/or electrically connected to group IV devices in the group IV substrate.

A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

A method of fabricating CMOS image sensors is disclosed. In contrast to traditional fabrication processes, the present sequence implants dopants into the epitaxial layer from both the first surface and the second surface. Because dopant is introduced through both sides, the maximum implant energy to perform the implant may be reduced by as much as 50%. In certain embodiments, the second implant is performed prior to the application of the electrical contacts. In another embodiments, the second implant is performed after the application of the electrical contacts. This method may allow deeper photodiodes to be fabricated using currently available semiconductor processing equipment than would otherwise be possible.

A source wafer for use in a micro-transfer printing process. The source wafer comprises: a substrate; a device coupon (110), including an optoelectronic device; and a breakable tether securing the device coupon to the substrate. The breakable tether includes one or more breaking regions which connect the breakable tether to the substrate.

A photo-sensitive device includes a uniform layer, a gradated buffer layer over the uniform layer, a silicon layer over the gradated buffer layer, a photo-sensitive light-sensing region in the uniform layer and the silicon layer, a device layer on the silicon layer, and a carrier wafer bonded to the device layer.

A method of manufacturing an image sensing apparatus includes: forming a first substrate structure including a first region of a pixel region, the first substrate structure having a first surface and a second surface; forming a second substrate structure including a circuit region for driving the pixel region, the second substrate structure having a third surface and a fourth surface; bonding the first substrate structure to the second substrate structure, such that the first surface is connected to the third surface; forming a second region of the pixel region on the second surface; forming a first connection via, the first connection via extending from the second surface to pass through the first substrate structure; mounting semiconductor chips on the fourth surface, using a conductive bump; and separating a stack structure of the first substrate structure, the second substrate structure, and the semiconductor chips into unit image sensing apparatuses.

In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed.