A semiconductor heterostructure for an optoelectronic device is disclosed. The semiconductor heterostructure includes at least one stress control layer within a plurality of semiconductor layers used in the optoelectronic device. Each stress control layer includes stress control regions separated from adjacent stress control regions by a predetermined spacing. The stress control layer induces one of a tensile stress and a compressive stress in an adjacent semiconductor layer.

A growth method of aluminum gallium nitride is disclosed. The method includes the steps of: providing a substrate; forming a first aluminum gallium nitride layer on the substrate at a first temperature; and forming a second aluminum gallium nitride layer, on the first aluminum gallium nitride layer, at a second temperature. The first temperature is higher than the second temperature.

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The electron blocking layer is located between the active region and the p-type contact layer. In an embodiment, the electron blocking layer can include a plurality of sublayers that vary in composition.

A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer.

In a method according to embodiments of the invention, a semiconductor structure including a III-nitride light emitting layer disposed between a p-type region and an n-type region is grown. The p-type region is buried within the semiconductor structure. A trench is formed in the semiconductor structure. The trench exposes the p-type region. After forming the trench, the semiconductor structure is annealed.

The present invention is a light emitting diode (LED) device including a substrate, a buffer layer, a first conductivity type semiconductor layer, a light emitting layer, an interlayer, an electron blocking layer, and a second conductivity type semiconductor layer. The thickness of the interlayer is substantially thinner than the thickness of the electron blocking layer. In an embodiment of the present invention, the interlayer is doped with a p-type dopant, and the electron blocking layer is doped with a p-type dopant, and the concentration of the p-type dopant of the interlayer is lower than the concentration of the p-type dopant of the electron blocking layer.

Provided is a light-emitting element which is capable of improving the external quantum efficiency by controlling a dopant concentration of an interface between a light-emitting layer and another semiconductor layer.

A nitride-based semiconductor light-emitting element includes: a first semiconductor layer 20 of a first conductivity type; a second semiconductor layer 50 of a second conductivity type; a carrier block layer 40 provided in the second semiconductor layer 50 on a side closer to the first semiconductor layer 20 and containing an impurity of the second conductivity type; a light-emitting layer 30 provided between the first semiconductor layer 20 and the carrier block layer 40; and a spacer layer 35 which is provided between the carrier block layer 40 and the light-emitting layer 30 and makes the concentration of the impurity of the second conductivity type in the vicinity of the interface with the light-emitting layer 30 be at a predetermined concentration or less.

A self-supporting substrate includes a first nitride layer grown by hydride vapor deposition method or ammonothermal method and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium; and a second nitride layer grown by a sodium flux method on the first nitride layer and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium. The first nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the first nitride layer. The second nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the second nitride layer. The first nitride layer has a thickness larger than a thickness of the second nitride layer.

A method for producing a semiconductor chip (100) is provided, in which, during a growth process for growing a first semiconductor layer (1), an inhomogeneous lateral temperature distribution is created along at least one direction of extent of the growing first semiconductor layer (1), such that a lateral variation of a material composition of the first semiconductor layer (1) is produced. A semiconductor chip (100) is additionally provided.

A semiconductor epitaxial structure and a method for manufacturing the same, and a light-emitting diode are provided. The semiconductor epitaxial structure includes a first-type semiconductor layer, a light-emitting layer, and a second-type semiconductor layer. The light-emitting layer is disposed on the first-type semiconductor layer. The second-type semiconductor layer is disposed on the light-emitting layer. The light-emitting layer includes potential well layers and potential barrier layers which are repeatedly stacked. At least part of potential barrier layers belonging to intermediate layers of the light-emitting layer is doped, and has a doping type same as the second-type semiconductor layer.