Patent classifications
H01L2224/78
Fine wire manipulator
A system for manipulating a filament can include a filament supply from which a filament can be drawn, the filament supply being positioned along an axis, a vacuum manipulator assembly positioned along the axis, wherein the vacuum manipulator assembly is configured to engage the filament when a vacuum is drawn through the vacuum manipulator assembly and draw the filament along the axis to a workpiece, and a welding tool comprising a welding head positioned along the axis between the filament supply and the vacuum manipulator assembly, the welding tool being configured to weld the filament to the workpiece.
Bonding wire for semiconductor device
A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:
Strength ratio=ultimate strength/0.2% offset yield strength.(1)
Bonding wire for semiconductor device
A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:
Strength ratio=ultimate strength/0.2% offset yield strength.(1)
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
Ball forming device for wire bonder
A ball forming device includes a first current control circuit to control discharge current arranged between a leading end of a wire and one electrode of a discharge continuing power source for causing discharge current to flow after dielectric breakdown, a second current control circuit to control shunting of discharge current arranged between a discharge electrode and the other electrode of the discharge continuing power source, and a fixed resistor connected to the second current control circuit in parallel as a shunt and controls current flowing through the second current control circuit, thereby a discharge voltage value is adequately changed.
Packaged semiconductor assemblies and methods for manufacturing such assemblies
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
Packaged semiconductor assemblies and methods for manufacturing such assemblies
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
CAPILLARY TRANSPORT DEVICE, CAPILLARY MOUNTING DEVICE, CAPILLARY REPLACEMENT DEVICE, CAPILLARY TRANSPORT METHOD, CAPILLARY MOUNTING METHOD, AND CAPILLARY REPLACEMENT METHOD
There is provided a capillary transport device capable of inserting, without manpower, a capillary into a mounting section of an ultrasonic horn. According to an aspect of the present invention, a capillary transport device includes: a first tube 17 for transporting a capillary 13; an ultrasonic horn 11 with a mounting section for mounting the capillary; a first movement mechanism for relatively moving the ultrasonic horn and a first end 17a of the first tube; and a mechanism for blowing gas into a second end 17b of the first tube.
BONDING WIRE FOR SEMICONDUCTOR DEVICE
There is provided a bonding wire for a semiconductor device including a coating layer having Pd as a main component on a surface of a Cu alloy core material and a skin alloy layer containing Au and Pd on a surface of the coating layer, the bonding wire further improving 2nd bondability on a Pd-plated lead frame and achieving excellent ball bondability even in a high-humidity heating condition. The bonding wire for a semiconductor device including the coating layer having Pd as a main component on the surface of the Cu alloy core material and the skin alloy layer containing Au and Pd on the surface of the coating layer has a Cu concentration of 1 to 10 at % at an outermost surface thereof and has the core material containing either or both of Pd and Pt in a total amount of 0.1 to 3.0% by mass, thereby achieving improvement in the 2nd bondability and excellent ball bondability in the high-humidity heating condition. Furthermore, a maximum concentration of Au in the skin alloy layer is preferably 15 at % to 75 at %.