Provided herein are processes for making, and methods of using, solid-state batteries which include sulfide electrolytes in the solid-state separator and in the cathode as a catholyte. The process comprises providing at least two layered stacks, and compressing the at least two layered stacks at a pressure between 30 and 5000 MPa and at a temperature of 50° C. to 250° C. Also set forth herein are electrochemical cells and devices made by these processes.

A method of fabricating a porous wafer battery comprises the steps of providing a silicon wafer comprising a plurality of pores; applying a first metallization process; applying a passivation process; applying solder balls, aligning the silicon wafer with a substance, and applying a solder reflow process. A method using a porous wafer battery comprises the steps of connecting the porous wafer battery to a plurality of sensors, a plurality of switches, and a battery management system; monitoring temperature, resistance, or current; and electrically disconnecting a non-properly functioning pore.

A chip comprises a porous wafer battery and a device. The chip further comprises a wafer containing the device and at least a portion of the porous wafer battery. The wafer comprises a silicon substrate. The silicon substrate comprises a first region and a second region. The first region comprises a plurality of pores of the porous wafer battery. The second region 345 comprises a trench to accommodate a gate electrode of the device. A method of fabrication a chip comprising the steps of providing a substrate comprising a plurality of doped regions; patterning a mask on a front surface of the substrate; applying an etching process forming the plurality of pores in the first region of the substrate and the trench in the second region of the substrate; and then removing the mask.

A porous two-wafer battery comprises a first wafer and a second wafer. Each of the first wafer and the second wafer comprises a substrate, a conductive layer, and a passivation layer. The first wafer is parallel to the second wafer. The passivation layer of the first wafer is closer to the passivation layer of the second wafer. The first wafer serves as an anode and the second wafer serves as a cathode. The substrate comprises a plurality of pores and a P+ doped region. The plurality of pores are symmetric with respect to a respective center of each of the first wafer and the second wafer. An adhesion promotion layer is between the conductive layer and a respective side wall of the plurality of pores.

A method of fabricating a porous wafer battery comprises the steps of providing a silicon wafer; forming a P+ doped region; patterning a mask; applying an etching process; removing the mask; applying a first metallization process; applying a second metallization process; applying a passivation process; and applying a back-end metallization process. A P+ doped region is introduced in the wafer. The P+ doped region can serve as an etch stop. The P+ doped region may also act as a good Ohmic contact for the back-end metallization.

A battery package comprises a plurality of porous wafer batteries and a housing enclosing the plurality of porous wafer batteries. Each of the plurality of porous wafer batteries may be a one-wafer battery or a two-wafer battery. Each pore of a plurality of pores of the one-wafer battery comprises a respective anode and a respective cathode. A first wafer of the two-wafer battery is an anode and a second wafer of the two-wafer battery is a cathode. The battery package further comprises a plurality of heating wafers and a plurality of cooling wafers. A cavity of the housing may be filled with a liquid.

A battery includes a first electrode layer; and a second electrode layer disposed on the first electrode layer and serving as a counter electrode for the first electrode layer, wherein the first electrode layer includes a first current collector, a first active material layer, and a first solid electrolyte layer, the first active material layer is disposed to be in contact with the first current collector and to occupy a smaller area than the first current collector, the first solid electrolyte layer is disposed to be in contact with the first current collector and the first active material layer and to occupy the same area as the first current collector, the first active material layer faces the second electrode layer with the first solid electrolyte layer therebetween, and the first electrode layer includes a peripheral portion including a first rounded portion.

A battery includes a first electrode layer; and a second electrode layer disposed on the first electrode layer and serving as a counter electrode for the first electrode layer, wherein the first electrode layer includes a first current collector, a first active material layer, and a first solid electrolyte layer, the first active material layer is disposed to be in contact with the first current collector and to occupy a smaller area than the first current collector, the first solid electrolyte layer is disposed to be in contact with the first current collector and the first active material layer and to occupy the same area as the first current collector, the first active material layer faces the second electrode layer with the first solid electrolyte layer therebetween, and the first electrode layer includes a peripheral portion including a first rounded portion.

A silicon and sulfur battery and methods are shown. In one example, the silicon and sulfur battery includes a lithium chip coupled to a silicon electrode. In some examples, the silicon electrode is formed from silicon nanoparticles and carbon.

A cylindrical lithium-ion battery which can maintain working temperature within a certain range includes a battery cell having a positive electrode plate and a negative electrode plate. The negative electrode plate includes a negative current collector and a negative active material layer on the negative current collector. The positive electrode plate includes a positive current collector and a positive active material layer on the positive current collector. The positive electrode plate and/or the negative electrode plate includes a heat conducting and collecting body. The heat conducting and collecting body is a portion of the positive current collector not coated by the positive active material layer or a portion of the negative current collector not coated by the negative active material layer. At least two heat conducting and collecting bodies are stacked together to a heat converging path. A thin-film heater is connected to the heat converging path.