Patent classifications
H01P3/026
Integrated circuit-to-waveguide slot array coupler
A coupler comprising a silicon substrate with one or more double slot radiators configured to transmit or receive an RF signal, a slot balun circuit configured to isolate the RF signal, and a grounded coplanar waveguide configured to propagate the RF signal in a horizontal direction. The coupler can be included on an integrated chip with a second coupler and the chip can be positioned over two waveguides such that each coupler is positioned within the center of each waveguide aperture.
Method to improve PCB trace conductivity and system therefor
A method may include receiving a first and a second complementary signal to provide differential signaling. The method may further include providing a first conductor trace to transport the first complementary signal; providing a second conductor trace to transport the second complementary signal, the second conductor trace immediately adjacent to the first conductor trace; providing a third conductor trace to transport the first complementary signal, the third conductor trace immediately adjacent to the second conductor trace; and providing a fourth conductor trace to transport the second complementary signal, the fourth conductor trace immediately adjacent to the third conductor trace.
Manufacturing Method for High-Frequency Package
After a distal end portion of a first lead of a first lead frame is connected to a first signal pad, and a distal end portion of a second lead is connected to a second signal pad, the interval between the linear portion of the first lead and the linear portion of the second lead is adjusted using a lead shape changing jig.
PRINTED WIRING BOARD
A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.
PRINTED WIRING BOARD
A printed wiring board includes resin insulating layers, and conductor layers laminated on the resin insulating layers, respectively. The conductor layers includes a conductor layer including a conductor circuit formed such that the conductor circuit has recesses each having a depth of 2.0 μm or more and a bottom whose diameter is larger than a diameter of an opening part of a respective one of the recesses.
Semiconductor package
A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage.
Communication system including a reception coupler coupled to a transmission line
A communication system includes a transmission line and a reception coupler that couples to the transmission line in an electromagnetic field and moves along the transmission line, wherein the reception coupler has end parts narrower than other parts with respect to a transmission direction of the transmission line.
CONDUCTOR TRACK ARRANGEMENT FOR HIGH-FREQUENCY SIGNALS, BASE AND ELECTRONIC COMPONENT HAVING A CONDUCTOR TRACK ARRANGEMENT
A conductor track arrangement for high-frequency signals is provided. The arrangement includes a carrier, a ground conductor, and a pair of signal conductors. The signal conductors are layered and are arranged on the carrier opposite the ground conductor. A distance is between the signal conductors, which have a deflection region, in which a direction of the signal conductors changes. The deflection region has a reduced distance, which is reduced compared to the distance d between the signal conductors outside the deflection region. The distance between the signal conductors in transition regions from straight portions of the signal conductors into the deflection region is reduced here symmetrically with respect to an extension of a centre line between the two signal conductors into their respective straight portions and/or a capacitor is introduced into the signal conductor considered to be the inner signal conductor in respect of the direction change.
Transition between a single-ended port and differential ports having stubs that match with input impedances of the single-ended and differential ports
This document describes techniques, apparatuses, and systems utilizing a high-isolation transition design for differential signal ports. A differential input transition structure includes a first layer and a second layer made of a conductive metal and a substrate positioned between the first and second layers. The second layer includes a first section that electrically connects to a single-ended signal contact point and to a first contact point of a differential signal port. The first section includes a first stub based on an input impedance of the single-ended signal contact point and a second stub based on a differential input impedance associated with the differential signal port. The second layer includes a second section that electrically connects to a second contact point of the differential signal port and to the first layer through a via housed in a pad. The second section includes a third stub associated with the differential input impedance.
Skew compensation apparatus for controlling transmission line impedance
One embodiment provides a printed circuit board (PCB). The PCB can include one or more metal layers and at least a pair of differential transmission lines. The pair of differential transmission lines can include a first transmission line and a second transmission line. The first transmission line can include a plurality of timing-skew-compensation structures, and a respective timing-skew-compensation structure of the first transmission line or a corresponding segment of the second transmission line adjacent to the timing-skew-compensation structure has a non-uniform width.