Described embodiments include a circuit for limiting power converter output ripple. A first transistor has a first current terminal receiving an input voltage, and a second current terminal coupled to a first capacitor. A second transistor has a third current terminal coupled to the first capacitor, and a fourth current terminal is coupled to a second capacitor. A third transistor has a fifth current terminal coupled to the second capacitor, and a sixth terminal coupled to a filter input. A fourth transistor has a seventh current terminal coupled to the second current terminal, and an eighth current terminal coupled to the sixth current terminal. A fifth transistor has a ninth current terminal coupled to the fourth current terminal, and a tenth current terminal coupled to the sixth current terminal.

Described embodiments include a circuit for limiting power converter output ripple. A first transistor has a first current terminal receiving an input voltage, and a second current terminal coupled to a first capacitor. A second transistor has a third current terminal coupled to the first capacitor, and a fourth current terminal is coupled to a second capacitor. A third transistor has a fifth current terminal coupled to the second capacitor, and a sixth terminal coupled to a filter input. A fourth transistor has a seventh current terminal coupled to the second current terminal, and an eighth current terminal coupled to the sixth current terminal. A fifth transistor has a ninth current terminal coupled to the fourth current terminal, and a tenth current terminal coupled to the sixth current terminal.

A power conversion device suppresses voltage variation of a power supply bus. The device includes a variation compensation circuit and a control circuit. The variation compensation circuit includes: a first capacitor connected to the power supply bus; a second capacitor connected in series between the first capacitor and a ground; an auxiliary capacitor; and a converter including a switching element and having a voltage step-down function, the converter being connected to the second capacitor and the auxiliary capacitor. The control circuit includes an active power calculating section that calculates instantaneous active power ip in the variation compensation circuit. The control circuit controls the voltage Vc of the auxiliary capacitor using the instantaneous active power ip.

Disclosed are a Power Factor Correction (PFC) control method, apparatus, and device, and a computer-readable storage medium. The method includes: acquiring an input voltage value, input current value, and output voltage value from a PFC circuit (S101); acquiring a current reference value for current loop control by using a Prony’s method according to the input voltage value, the output voltage value, and a preset voltage reference value (S102); and performing current loop control according to the current reference value and the input current value, and outputting a corresponding Pulse Width Modulation (PWM) signal, so as to control a switch tube in the PFC circuit to be correspondingly switched on or switched off (S103).

Techniques and apparatus for current-based transitioning between a buck converter mode and a charge pump mode in an adaptive combination power supply circuit. One example power supply circuit generally includes a switching regulator and control logic coupled to the switching regulator. The control logic is generally configured to compare an indication of a current associated with the switching regulator to a threshold and to control a transition of the switching regulator between a buck converter mode and a charge pump mode based on the comparison.

A frequency-locked circuit for a variable frequency topology is configured to trigger a Pulse Width Modulation (PWM) controller to lock a frequency of a driving signal outputted by the PWM controller. The frequency-locked circuit includes an AC wave generating circuit and a comparator. The AC wave generating circuit receives and converts the driving signal to generate an AC wave signal. The comparator is electrically connected to the AC wave generating circuit and receives the AC wave signal. The comparator compares the AC wave signal with a reference signal to generate a comparison output signal. In response to determining that the AC wave signal is greater than the reference signal, the comparison output signal triggers the PWM controller to convert the driving signal from one voltage level to another voltage level so as to lock the frequency. The one voltage level is different from the another voltage level.

In a power conversion system, a power converter includes a power conversion circuit connected to a direct current (DC) source via a DC distribution line and converts and supplies received DC power to a load, and a power conversion control unit. A power stabilizing device is disposed between the DC distribution line and the power converter and stabilizes a DC voltage applied from the DC power source. A control power source of the power stabilizing device performs current control of the current transformer to suppress DC magnetization caused by a DC current component of the primary current while compensating for a varying component of the DC voltage. The control power source acquires current information or voltage information calculated from control information used by the power conversion control unit for control operations related to energization of the load and uses it as control information for the power stabilizing device.

A first node of converter circuit receives an input, provides an output at a second node, and has a third node coupled by an inductance to ground. A first switch has a current path between the first and third nodes and a second switch has a current path between the third and second nodes. The converter circuit operates in a first state (with the first switch conductive and the second switch non-conductive) and a second state (with the first switch non-conductive and the second switch conductive). Current flowing through the first switch is sensed during the first state to produce a sensing signal indicative of inductance current. The sensing signal is averaged to produce an averaged sensing signal indicative of an average value of the current. The averaged sensing signal is then weighted by a time during which the second switch is conductive to produce a weighted signal.

A power conversion device includes a filter circuit unit between a power conversion unit and a smoothing capacitor for smoothing a pulsating flow accompanying power conversion in the power conversion unit to absorb at least a part of a high-frequency component of the pulsating flow.

In the parallel operation of power supply units, a high line ripple current may be observed in output when the power supply units (PSUs) are supplied with different inputs. For example, a high line ripple current may be observed when PSUs were supplied with different line frequency inputs and/or when PSUs were supplied with different phase angle input lines. A low pass filter is in a control loop which is capable of filtering the line frequency to get an average current reference signal. The average current reference signal is compared with the real time output current to generate an error signal. This error signal is fed back to a voltage control loop to adjust the output in order to compensate the line ripple.