A voltage controlled oscillator is provided. The voltage controlled oscillator includes a current controlled oscillator, a voltage to current conversion circuit and a noise cancellation circuit. The current controlled oscillator is configured to receive a bias current and generate an oscillating signal with an oscillating frequency according to the bias current. The voltage to current conversion circuit is coupled to a power supply voltage and configured to generate a supply current according to an input voltage. The noise cancellation circuit is configured to receive a bias voltage and the supply current from the voltage to current conversion circuit, and configured to generate a noise cancellation current in response to power supply voltage variation and cancel the noise cancellation current from the supply current to generate the bias current. The bias voltage of the noise cancellation circuit is coupled to an internal voltage of the voltage to current conversion circuit.

An oscillator circuit (100) comprises a crystal oscillator (10) arranged to generate an oscillation signal, a bias current generator (20) arranged to supply a bias current to the crystal oscillator (10), and a feedback stage (30) arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator (20) is arranged to: in response to a supply of power to the oscillator circuit (100) being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator (10), supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

A square wave oscillator includes a Schmitt Trigger with a first output that outputs a first output current, a capacitor connected to the first output of the Schmitt Trigger, and a resistor that connects the capacitor to an input of the Schmitt Trigger to form a closed-loop negative feedback. The closed-loop negative feedback sustains an oscillation of the square wave oscillator and causes a frequency and an amplitude of the oscillation to be independent of a supply voltage of the Schmitt Trigger.

A method of operating an oscillator circuit comprising a resonator is provided. The method comprises maintaining a resonance of the resonator by a) connecting the resonator to an input voltage (V.sub.buf) for a first pulse period to charge the resonator only partially towards the input voltage (V.sub.buf); b) connecting the resonator to a second, lower, voltage for a second pulse period to discharge the resonator at least partially; and repeating steps a) and b) at a rate corresponding to the resonance of the resonator and with a phase corresponding to the resonance of the resonator, so as to maintain the resonance of the resonator.

Methods, systems, and circuitries are provided to generate clock signals of different qualities in a device. A method includes determining whether the device is operating in a mid power mode or a high power mode. In response to determining that the device is operating in the mid power mode, oscillator circuitry is controlled to cause the oscillator circuitry to consume a lower amount of power, such that the oscillator circuitry generates a lower quality clock signal. In response to determining that the device is operating in the high power mode, the oscillator circuitry is controlled to cause the oscillator circuitry to consume a higher amount of power, such that the oscillator circuitry generates a higher quality clock signal. The lower amount of power and the higher amount of power are different from one another.

The disclosure discloses an RC oscillating circuit. A first end of a capacitor is grounded, a second end of the capacitor is connected to a charging path, a discharging path and a comparator, A first input end of a comparator is connected to first reference voltage. An output end of the comparator outputs a first output signal and is connected to a control end of the discharging path. The first reference voltage provides the flipped voltage of the comparator The first output signal forms an output clock signal. A first regulating circuit is configured to regulate the magnitude of the charging current and realize coarse frequency tuning. A second regulating circuit is configured to regulate the magnitude of the first reference voltage and realize fine frequency tuning. The disclosure has the advantages of low power consumption, fast start, high precision and wide tuning range.

A voltage controlled oscillator (VCO) is described. The VCO includes a plurality of nodes coupled with a plurality of transistors, and a first inductor-capacitor (LC) tank coupled with a second LC tank. The first LC tank and the second LC tank include a shared inductor structure coupled to the plurality of nodes. The first LC tank and the second LC tank each include a capacitor. The capacitors are each coupled on a first side to a node of the plurality of nodes and on a second side to a respective capacitor in the other LC tank. The first LC tank and the second LC tank are configured to resonate at a fundamental frequency for differential-mode signals, and the first LC tank and the second LC tank are configured to resonate at twice the fundamental frequency for common-mode signals.

An oscillation circuit includes an oscillator (X.sub.1), capacitors (C.sub.1, C.sub.2) connected between two terminals of the oscillator (X.sub.1), and an amplification circuit (A.sub.1) having an input terminal connected to a connecting point between the oscillator (X.sub.1) and the capacitor (C.sub.1) and an output terminal connected to a connecting point between the capacitor (C.sub.1) and the capacitor (C.sub.2). The amplification circuit (A.sub.1) includes an n-type transistor (M.sub.1) and a p-type transistor (M.sub.2) respectively having source terminals, the connecting point of which is connected to the output terminal of the amplification circuit (A.sub.1), a p-type transistor (M.sub.3) configured to connect a gate terminal of the n-type transistor (M.sub.1) to a power supply terminal at the time of an oscillation stop and disconnect the power supply terminal and the gate terminal of the n-type transistor (M.sub.1) at the time of an oscillation operation, and an n-type transistor (M.sub.4) configured to connect a gate terminal of the p-type transistor (M.sub.2) to ground at the time of the oscillation stop and disconnect a ground terminal and the gate terminal of the p-type transistor (M.sub.2) at the time of the oscillation operation. It is possible to implement low power consumption and high-speed oscillation activation of the oscillation circuit.