VLSI distributed LC resonant clock networks having reduced inductor dimensions as well as simplified decoupling capacitances that are obtained by including one or more compensation capacitors. A compensation capacitor can be added in parallel with a clock capacitance and/or in parallel with a clock inductor. The presence of a compensation capacitance reduces the overhead associated with the inductor and the decoupling capacitor. The compensation capacitor (s) can be selectively switched into the network to create scalable resonant frequencies.

The present invention concerns an electronic oscillator comprising: an LC resonant circuit comprising an inductive component and a capacitive component, the LC resonant circuit being connected to a first reference voltage node and to an oscillator output node; a first transistor connected to the oscillator output node and arranged to periodically operate in a conducting state and a non-conducting state; and a phase shift circuit. A phase shift circuit output is connected to the first transistor, while a phase shift circuit input is connected by a first feedback circuit to the oscillator output node. The phase shift circuit comprises a signal phase shifter for shifting the phase of a first feedback signal from the first feedback circuit by substantially 180 degrees. The phase shift circuit further comprises a signal adder for adding a first signal from the signal phase shifter and a second signal to obtain a summed signal; and a second transistor connected to the signal adder for mirroring the summed signal to the oscillator output node through the first transistor.

A low-power crystal oscillator circuit operating in Class B includes a PMOS transistor, an NMOS transistor, a step-down voltage regulator, and a bias voltage generator. A feedback mechanism includes an inverter whose input is connected to the drains of the PMOS and NMOS transistors and whose output is capacitively coupled to the gate of the PMOS transistor to provide positive feedback.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

A crystal oscillation circuit includes a crystal oscillator coupled between an input pad node and an output pad node, a current mirror inverting amplifier configured to have a first input terminal coupled to the input pad node and an output terminal coupled to the output pad node, a detection logic circuit configured to detect a signal of the output pad node to generate an output pad node detection signal, and an automatic control logic circuit configured to apply a pull-up driver control signal to a second input terminal of the current mirror inverting amplifier in response to the output pad node detection signal. The current mirror inverting amplifier operates with a first gain or a second gain lower than the first gain according to the pull-up driver control signal.

A switching inductor device having a first port and a second port includes a first inductor and a second inductor with a switch circuit. The first inductor is coupled between the first port and the second port. The second inductor and the switch circuit are connected in series, and are coupled between the first port and the second port; the first inductor and the second inductor are connected in parallel when the switch circuit is turned on.

An oscillator circuit (100) comprises a crystal oscillator (10) arranged to generate an oscillation signal, a bias current generator (20) arranged to supply a bias current to the crystal oscillator (10), and a feedback stage (30) arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator (20) is arranged to: in response to a supply of power to the oscillator circuit (100) being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator (10), supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

A method and crystal oscillator circuit for matching a supply voltage with a drive level of a crystal are disclosed. The crystal oscillator circuit is based on a Pierce oscillator circuit which further comprises a capacitor C.sub.d. The capacitor C.sub.d together with the load capacitor act as a capacitive voltage divider and the capacitance of this capacitor may be selected to reduce the supply voltage to match the drive level of the crystal oscillator without affecting the oscillation margin of the crystal.

An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.

Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes an inductor included in an integrated circuit device, and a first oscillator and a second oscillator included in the integrated circuit device. The first oscillator includes a first terminal coupled to a conductive path of the inductor to provide a first signal. The second oscillator includes a second terminal coupled to the conductive path to provide a second signal. The first and second signals have different frequencies.