There is provided mechanisms for enabling linearization of a non-linear electronic device. A method is performed by a linearizer device. The method comprises receiving an input signal destined to be input to the non-linear electronic device. Input-output characteristics of the non-linear electronic device is represented by a model. The model is defined by a mathematical expression, and wherein input-output characteristics of the linearizer device is given by the linearization function. The linearization function is determined by applying a function recursion to the mathematical expression of the model. The method comprises obtaining an output signal by subjecting the input signal to the linearization function. The method comprises providing the output signal, instead of the input signal, as input to the non-linear electronic device, thereby enabling linearization of the non-linear electronic device.

There is provided mechanisms for enabling linearization of a non-linear electronic device. A method is performed by a linearizer device. The method comprises receiving an input signal destined to be input to the non-linear electronic device. Input-output characteristics of the non-linear electronic device is represented by a model. The model is defined by a mathematical expression, and wherein input-output characteristics of the linearizer device is given by the linearization function. The linearization function is determined by applying a function recursion to the mathematical expression of the model. The method comprises obtaining an output signal by subjecting the input signal to the linearization function. The method comprises providing the output signal, instead of the input signal, as input to the non-linear electronic device, thereby enabling linearization of the non-linear electronic device.

A compensation circuit includes a power amplifier, a current bias circuit, a power detection circuit and a current control circuit; the power detection circuit is configured to detect the voltage amplitude of the radio frequency input signal of the power amplifier and output a reference current when the voltage amplitude meets a preset condition; the current control circuit is configured to receive a reference current and output a compensation current to the current bias circuit based on the reference current; the current bias circuit is configured to receive the compensation current and generate the direct-current bias current, and output the compensation current and the direct-current bias current to the power amplifier; and the power amplifier is configured to receive the compensation current and the direct-current bias current, and amplify the power of the radio frequency input signal based on the compensation current and the direct-current bias current.

A compensation circuit includes a power amplifier, a current bias circuit, a power detection circuit and a current control circuit; the power detection circuit is configured to detect the voltage amplitude of the radio frequency input signal of the power amplifier and output a reference current when the voltage amplitude meets a preset condition; the current control circuit is configured to receive a reference current and output a compensation current to the current bias circuit based on the reference current; the current bias circuit is configured to receive the compensation current and generate the direct-current bias current, and output the compensation current and the direct-current bias current to the power amplifier; and the power amplifier is configured to receive the compensation current and the direct-current bias current, and amplify the power of the radio frequency input signal based on the compensation current and the direct-current bias current.

This application is generally related to methods for improving performance in a system. One of the methods may include a step of determining whether absorbed power in a system meets a predetermined threshold. The absorbed power may be based upon first and second Walsh codes transmitted to each of first and second gain and phase modulators in the system. The first Walsh code may be orthogonal to the second Walsh code. A first set of the first and second Walsh codes may be inverted with respect to a second set of the first and second Walsh codes. The method may also include a step of modulating the absorbed power in view of the determination. The method may further include a step of transmitting feedback based upon the modulated power to the first and second gain and phase modulators.

A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.

A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.

A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.

A symbol power tracking amplification system including: a modem to generate data and symbol tracking signals; a symbol tracking modulator including a control circuit, first and second voltage supply circuits and a switch circuit, the control circuit generates first and second voltage level control signals in response to the symbol tracking signal, the first voltage supply circuit generates a first output voltage in response to the first voltage level control signal, the second voltage supply circuit generates a second output voltage in response to the second voltage level control signal and the switch circuit outputs the first or second output voltages as a supply voltage in response to a switch control signal; an RF block to generate an RF signal based on the data signal from the modem; and a power amplifier to adjust a power level of the RF signal based on the supply voltage.

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.