Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage that varies according to a control voltage. The control voltage can be related to a desired output power of the amplifier and/or to an envelope signal of an input signal to the amplifier. Particular biasing for selectively controlling the stacked transistors to operate in either a saturation region or a triode region is also presented. Benefits of such controlling, including increased linear response of an output power of the amplifier, are also discussed.

A driver that drives an optical device, such as laser diode (LD) and/or optical modulator, is disclosed. The driver includes a variable gain amplifier (VGA) and a post amplifier. The post amplifier amplifies an output of the VGA to a preset amplifier as varying the gain of the VGA. The VGA includes two differential pairs each amplify the input signal oppositely in phases thereof and outputs of the differential pairs are compositely provided to the post amplifier. The gain of the VGA is varied by adjusting contribution of the second differential pair to the output of the VGA.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

There is provided an operational amplifier which is operable as well when an operating voltage decreases without creating a range where a circuit would not operate or reducing circuit gain. High-pass filters 102-105 provide output signals therefrom to bias-set input nodes of differential amplifiers Gm1-Gm4 to a potential within a common-mode range in which the respective differential amplifiers Gm1-Gm4 are operable. In this manner, the respective differential amplifiers Gm1-Gm4 can be operated effectively regardless of the possible decrease in a supply voltage, enabling normal amplifying operation. In addition, reduction in gain due to the reduced operational voltage is avoided. Therefore, it is preferably applicable to the application where digital and analog circuits are loaded together on the same IC chip. When a high-pass filter is required at each input side of two- or more-stage differential amplifiers, a phase compensation method utilizing multiple paths is provided for a lower range of a phase margin created at the low frequency side, enabling normal amplitude operation.

A circuit and method for regulating an output voltage are provided. The circuit includes a fully differential first stage amplifier, a second stage amplifier, and a power output driver transistor. The first stage amplifier receives a reference voltage and feedback voltage relative to an output voltage of the power output driver transistor. A differential output of the first stage amplifier is received at differential inputs of the second stage amplifier. The second stage amplifier provides a voltage at a control terminal of the power transistor. The output voltage of the power transistor is based on the voltage at the control terminal and a supply voltage coupled to the power output driver transistor.

Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).

Systems and method for improving operation of a radio frequency system are provided. One embodiment describes a radio frequency system, which includes a first switching power amplifier that outputs an amplified analog electrical signal based on a first input analog electrical signal and voltage of an envelope voltage supply rail. The first switching power amplifier includes a first transistor with a gate that receives the first input analog electrical signal, a source that is electrically coupled to the envelope voltage supply rail, and a drain that is electrically coupled to an output of the first switching power amplifier; a second transistor with a gate that receives the first input analog electrical signal, a source electrically coupled to ground, and a drain electrically coupled to the output of the first switching power amplifier; and a third transistor with a gate that receives the first input analog electrical signal, a drain electrically coupled to the envelope voltage supply rail, and a source electrically coupled to an output of a second switching power amplifier.

An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.

A phase shifter component is described. Inputs are arranged to selectively receive an inphase component of an in-phase (I) signal or an outphase I signal 180 out of phase with the inphase I signal, and to selectively receive an inphase component of a quadrature-phase (Q) signal or an outphase Q signal 180 out of phase with the inphase Q signal. A first gain portion includes only two transistor elements arranged to amplify the received outphase or inphase I signal. A second gain portion includes only two transistor elements arranged to amplify the received outphase or inphase Q signal. The first and second gain portions are configured to control the gain of the received outphase or inphase I signal and the received outphase or inphase Q signal, respectively, to provide a composite output signal with a desired phase shift between 0 and 360.