The present application discloses an amplifier circuit, a chip and an electronic device, which generates a positive output signal and a negative output signal according to a positive input signal and a negative input signal, wherein the positive input signal and the negative input signal have a corresponding input differential-mode voltage and input common-mode voltage, and the positive output signal and the negative output signal have a corresponding output differential-mode voltage and output common-mode voltage, and the amplifier circuit includes: an amplifying unit, configured to receive the positive input signal and the negative input signal and generate the positive output signal and the negative output signal; and an attenuation unit, including: a positive common-mode capacitor and a negative common-mode capacitor, configured to attenuate the input common-mode voltage below a first specific frequency.

In one embodiment, a method includes receiving, at an input of a transimpedance amplifier, an input electrical-current signal. The electrical-current signal includes a photodetector current and a DC cancellation current. The photodetector current corresponds to an input optical signal and includes an alternating-current (AC) portion and a direct-current (DC) portion. The method also includes performing, by the transimpedance amplifier, a transimpedance amplification of the input electrical-current signal to produce, at an output of the transimpedance amplifier, an output voltage signal corresponding to the input electrical-current signal. The method further includes providing, by a current-control circuit coupled to the input and the output of the transimpedance amplifier, the DC cancellation current to the input of the transimpedance amplifier, where the DC cancellation current is based on the output voltage signal.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

An impedance measurement circuit for determining a sense current of a guard-sense capacitive sensor operated in loading mode. The circuit includes a periodic signal voltage source for providing a periodic measurement voltage, a sense current measurement circuit, a differential amplifier that is configured to sense a complex voltage difference between the sense electrode and the guard electrode, a demodulator for obtaining, with reference to the periodic measurement voltage, an in-phase component and a quadrature component of the sensed complex voltage difference, and control loops for receiving the in-phase component and the quadrature component, respectively. An output signal of the first control loop and an output signal of the second control loop are usable to form a complex voltage that serves as a complex reference voltage for the sense current measurement circuit.

The present invention provides a differential to single-ended converter including a first input node, a second input node, an operational amplifier and a feedback circuit. The operational amplifier has a first terminal and a second terminal, wherein the first terminal of the operational amplifier receives a first signal from the first input terminal, and the second terminal of the operational amplifier receives a second signal from the second input terminal. The feedback circuit is configured to receive an output signal of the operational amplifier and generate a first feedback signal to the first terminal of the operational amplifier to reduce a swing of the first signal, and generate a second feedback signal to the second terminal of the operational amplifier to balance noises induced by the feedback circuit and inputted to the first terminal and the second terminal.

The present disclosure provides a protection circuit and a display panel. The protection circuit comprises: a power supply circuit for outputting a first voltage; an overvoltage protection circuit connected to the power supply circuit for feedback regulation of the first voltage, such that a first protection voltage outputted by the overvoltage protection circuit is maintained within a preset range; and an output regulator circuit connected to the overvoltage protection circuit for regulated output of a second protection voltage. Through the above embodiments, the present disclosure can always stabilize the outputted voltages within a preset range to achieve the purpose of providing a stable voltage for the display panel, thereby realizing accurate and rapid overvoltage protection of the display panel.

A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.

The invention relates to an amplification circuit (100), comprising: a VGA (2), an AGC loop (10) for automatically controlling the gain of the VGA (2), a switching circuit (14) for switching between an AGC mode, in which the gain of the VGA (2) is automatically controlled by an output signal of the AGC loop (10) and a manual gain control, MGC, mode, in which the gain of the VGA (2) can be manually controlled by an input signal, and a read/write circuit (30) with a contact (31) for connection to a peripheral system, wherein the read/write circuit (30) is configured, in the MGC mode, to provide the input signal from the contact (31) via a write-mode path (32) to the VGA (2), and, in the AGC mode, to provide the output signal of the AGC loop (10) via a read-mode path (33) on the contact (31).

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

A device for detecting electric potentials of the body of a patient has measuring electrode inputs (Y.sub.1, . . . , Y.sub.n) connected with and a plurality of outputs (A.sub.1, . . . , A.sub.n) via amplifiers (Op.sub.1, . . . , Op.sub.n). A summing unit (13) is connected with the outputs and outputs a mean value of the signals (E.sub.1, . . . , E.sub.n) output by the amplifiers. Common mode signals are removed from the signals (E.sub.1, . . . , E.sub.n) by a subtracting unit (19) which subtracts the output of the summing unit, amplified by an amplification factor (1/), from at least a portion of the output of the subtracting unit. The output of the subtracting unit is connected with the inputs of the amplifiers. The subtracting unit amplification factor (1/) and an amplification () of the amplifiers for the output of the subtracting unit are adapted, such that the reciprocal value of the amplification factor (1/) corresponds to the amplifiers amplification ().