Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Hybrid analog-digital processing systems are described. An example of a hybrid analog-digital processing system includes photonic accelerator configured to perform matrix-vector multiplication using light. The photonic accelerator exhibits a frequency response having a first bandwidth (e.g., less than 3 GHz). The hybrid analog-digital processing system further includes a plurality of analog-to-digital converters (ADCs) coupled to the photonic accelerator, and a plurality of digital equalizers coupled to the plurality of ADCs, wherein the digital equalizers are configured to set a frequency response of the hybrid analog-digital processing system to a second bandwidth greater than the first bandwidth.

A finite impulse response (FIR) filter including an input of the FIR filter that receives an RF input signal, a clock input configured to receive a clock signal, an output of the FIR filter that provides a filtered output signal, a plurality of signal paths including a plurality of sample-and-hold circuits and a plurality of multipliers arranged in parallel, each signal path including a respective sample-and-hold circuit and a respective multiplier being configured to receive the RF input signal and the clock signal to provide a modulated output signal, an adder configured to receive n modulated output signals from the plurality of signal paths and combine the n modulated output signals to produce the filtered output signal, and a controller.

A method and device estimate an amplitude of a periodic component in a measured analog signal, e.g. from an electric motor, and adapt a control law for an external entity, e.g., a variable speed drive (VSD) controlling the motor, based on the estimated amplitude. The measured analog signal is converted by delta-sigma modulation to a digital signal that is applied to at least one filter. Periodic signals of independent known periodic functions are also applied to the at least one filter. In response, the at least one filter provides the estimated amplitude of the periodic component in the measured analog signal that may be used to adapt the control law. A monitoring value for the electric motor may also be based on the estimated amplitude of the periodic component.

A method for controlling an FIR filter that processes sound signals based on setting of a band filter includes receiving, from a user, an instruction for control data that indicate a gain parameter of an amplitude characteristic corresponding to a transfer function represented as a function of angular frequency, generating a first amplitude characteristic that is an amplitude characteristic of the band filter, as a basis of an amplitude characteristic of the FIR filter, in accordance with the control data, receiving an instruction for a gain limit value from the user, limiting a gain curve of the first amplitude characteristic so as to be within the gain limit value that has been instructed, thereby acquiring a second amplitude characteristic, and setting filter coefficients of the FIR filter based on the second amplitude characteristic.

This invention presents a repeater enhanced MU-MIMO wireless communication system comprising a BS, a plural of repeaters, and a plural of UEs, where a repeater estimates the channel between itself and its upper communication node in the system, a repeater computes equalization coefficients based on the estimation of the channel coefficients, and a repeater applies the equalization coefficients to reduce the channel delay spread or increase the coherence bandwidth of the channel between communication nodes containing the BS, the UEs, or the repeaters.

A FIR filter (15), comprising an input terminal for receiving an input signal, a first filtering circuit comprising: a first transconductance device (30a) configured to generate a first current signal (i1) proportional to the input signal; a first analog switch (41a) commuted in n by a first digital gate signal (ϕ1) and configured to block the current signal when the first digital gate signal has a first value and to transmit the current signal to a first integrating capacitor (45a) when the first digital gate signal has a second value; characterized in that the first digital gate signal (ϕ1) comprises a periodic series of pulses, wherein the pulses have widths proportional to the filter coefficients.

Methods and systems for finite impulse response filter under a constrained sampling rate. A method for constrained sampling rate filtering includes segmenting an input signal with a first rate into a defined number of streams, wherein the defined number of streams sets an effective sample rate of each stream to at least less than a second rate and the second rate is less than the first rate, determining filter coefficients for a finite impulse response filter, grouping the filter coefficients into subsets of filter coefficients to match the defined number of streams, applying in parallel, for each of the defined number of streams, a subset of filter coefficients to a corresponding stream, and combining at least some outputs from the defined number of streams conditionally based on the second rate.

An inverter system for mitigating oscillation of an electric motor that drives a load comprises a torque command generation module for receiving a commanded torque from an operator of a vehicle. A torque damping module is configured to receive the commanded torque and generating a commanded compensating torque to dampen any mechanical oscillation or resonance of the electric motor based on the observed rotational speed of the motor. The torque damping module further comprises a digital filter of order greater than one, a gain adjuster and a limiter.

The systems and methods discussed herein related to digital to analog conversion. A digital to analog conversion a compensation circuit and a digital to analog conversion circuit. The compensation circuit includes a filter configured to provide roll off compensation in a baseband frequency using real coefficients. The compensation circuit is configured to convert the first digital signal to a second digital signal so that the second digital signal can be filtered by the filter using the real coefficients.