A low-power-consumption high-speed zero-current switch includes a delay controller, a driving stage and a power transistor MN, wherein: an input of the delay controller is connected with an external clock CLK, an output of the delay controller is connected with an input of the driving stage, and an output of the driving stage is connected with a gate of the power transistor MN; the delay controller includes a gate signal generator, a sampling circuit and a current controller, and three of which form a negative feedback loop for stabilizing the turn-on voltage V.sub.ON and the turn-off voltage V.sub.D to 0, so that when the power transistor MN is turned on or off, the source-drain voltage thereof is 0. The present invention no longer uses a high-power-consumption high-speed comparator, but uses a low-power-consumption delay controller to generate turn-on and turn-off signals of the power transistor.

A joint control method with variable ZVS angles for dynamic efficiency optimization in a WPC system for EVs under ZVS conditions, including: adjusting a phase-shift duty cycle of a secondary active rectifier to control a charging voltage and a charging current of EV's batteries through a charging voltage closed loop and a charging current closed loop, respectively; adjusting a power angle of the secondary active rectifier to control a ZVS angle of the secondary active rectifier through a secondary ZVS angle closed loop; adjusting a phase-shift duty cycle of a primary inverter to control a ZVS angle of the primary inverter through the primary ZVS angle closed loop; determining the current operating case of the WPC system and adjusting the ZVS angles of the primary inverter and the secondary active rectifier to automatically identify an optimal operating point with a maximum charging efficiency through the P&O method.

An active clamp switching power converter circuit includes a primary-side sensing circuit that generates a sensed voltage based on an auxiliary winding voltage of an auxiliary winding around the core having a same polarity as the primary winding. Based on the sensed voltage, a controller controls switching of a power switch coupled to the primary winding to control current through the primary winding and controls switching of an active clamp switch to control leakage current when the power switch is turned off. The controller regulates timing of the switching to turn on the power switch based on timing of a zero voltage switching condition for power efficient operation.

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

A solid state power controller configured to supply electric power from a power supply to at least one load, comprises: a solid state switching device having a first terminal (D) connected to the power supply, and a second terminal (S) connected to the load, the solid state switching device configured to switch between an OFF operation mode in which the second terminal (S) is electrically disconnected from the power supply, and an ON operation mode in which the second terminal (S) is electrically connected to the power supply, and a load current detection unit configured to detect a load current through the solid state switching device; wherein the load current detection unit comprises a first load current amplifier and a second load current amplifier.

Example MOSFET circuits include a first metal-oxide-semiconductor field-effect transistor (MOSFET) having a gate, a source and a drain, and a second MOSFET coupled in series with the first MOSFET. The second MOSFET has a gate, a source and a drain. The MOSFET circuit also includes a controller configured to supply a same control signal to the gate of the first MOSFET and the gate of the second MOSFET to turn on or turn off the first MOSFET and the second MOSFET when a drain-source voltage of the first MOSFET and a drain-source voltage of the second MOSFET are substantially zero. Other MOSFET circuits and methods of operating MOSFET circuits are also disclosed.

A controller IC has, for example, a current detection terminal for detecting a coil current passing in a switching power supply and an on-timing setter configured to check for a ground short circuit at the current detection terminal when an output transistor turns off to generate an on-timing setting signal so as to turn on the output transistor, during normal operation, at the time point that the coil current has decreased to a zero value or a value close thereto and, during a ground short circuit, after the lapse of a predetermined minimum off-period.

The present disclosure mainly provides a clamping circuit, coupled to a first end and a second end of a switching transistor through a first node and a second node, comprising: an RCD circuit, comprising a first resistor and a first capacitor connected in parallel between the second node and a third node, and a diode having a negative electrode coupled to the third node; and a first stabilivolt diode, having a negative electrode coupled to the first node and a positive electrode coupled to a positive electrode of the diode at a fourth node.

In one aspect, a power converter may include a plurality of inductor banks; a plurality of capacitor banks; an intermediate bus capacitor bank; a plurality of switches, each switch has a first power node and a second power node, and one control node that receives a control signal that maintains the switch in either ON state in which the circuit path between the first node and the second node are established, or OFF state in which the circuit path between the first node and the second node are eliminated; and a control logic that generates a plurality of signal combinations that are applied to the control nodes of said plurality of switches to enable the power converter to have a smooth voltage output and enhanced tolerance for a low voltage input bus for all signal combinations.

In one aspect, a power converter may include a plurality of inductor banks; a plurality of switches, each switch has a first power node and a second power node, and one control node that receives a control signal that maintains the switch in either ON state in which the circuit path between the first node and the second node are established, or OFF state in which the circuit path between the first node and the second node are eliminated; and a control logic that generates multiple signals that are applied to the control nodes of the switches. In one embodiment, the switches are MOSFETs; the first power nodes are drains and the second power nodes are sources, and the control nodes are gates.