H03K17/74

Electrostatic discharge clamp topology
11611342 · 2023-03-21 · ·

A clamping circuit comprises a first field-effect transistor (FET) having a gate, a source, and a drain, a diode, a first voltage source, and coupling circuitry configured to couple the first voltage source to the drain of the first FET and the diode to the source of the first FET.

Electrostatic discharge clamp topology
11611342 · 2023-03-21 · ·

A clamping circuit comprises a first field-effect transistor (FET) having a gate, a source, and a drain, a diode, a first voltage source, and coupling circuitry configured to couple the first voltage source to the drain of the first FET and the diode to the source of the first FET.

Hybrid diode silicon on insulator front end module and related method

A hybrid diode silicon on insulator front end module and related method are provided. The front end module includes a transmit branch that includes a transmit circuit and a receive branch that includes a receive circuit. The receive circuit includes a low noise amplifier, a pin diode including an anode and a cathode; and a switch. The anode of the pin diode is operatively connected to an antenna switch port and an input voltage source. The cathode of the pin diode is operatively connected to a cathode of the switch. Turning on the switch facilitates a drainage of residual electrical current at the pin diode.

MONOLITHIC MULTI-I REGION DIODE SWITCHES

Monolithic multi-throw diode switch structures are described. The monolithic multi-throw diode switches include a hybrid arrangement of diodes with different intrinsic regions. In one example, a method of manufacture of a monolithic multi-throw diode switch includes providing an intrinsic layer on an N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer to form a first PIN diode comprising a first effective intrinsic region of a first thickness, implanting a second P-type region to a second depth into the intrinsic layer to form a second PIN diode comprising a second effective intrinsic region of a second thickness, and forming at least one metal layer over the intrinsic layer to electrically couple the first PIN diode to a node between a common port and a first port of the switch.

MONOLITHIC MULTI-I REGION DIODE SWITCHES

Monolithic multi-throw diode switch structures are described. The monolithic multi-throw diode switches include a hybrid arrangement of diodes with different intrinsic regions. In one example, a method of manufacture of a monolithic multi-throw diode switch includes providing an intrinsic layer on an N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer to form a first PIN diode comprising a first effective intrinsic region of a first thickness, implanting a second P-type region to a second depth into the intrinsic layer to form a second PIN diode comprising a second effective intrinsic region of a second thickness, and forming at least one metal layer over the intrinsic layer to electrically couple the first PIN diode to a node between a common port and a first port of the switch.

Electronic Circuit with a Transistor Device and a Biasing Circuit

An electronic circuit is disclosed. The electronic circuit includes: a half-bridge with a first transistor device (1) and a second transistor device (1a); a first biasing circuit (3) connected in parallel with a load path of the first transistor device (1) and comprising a first electronic switch (31); a second biasing circuit (3a) connected in parallel with a load path of the second transistor device (1a) and comprising a second electronic switch (31a); and a drive circuit arrangement (DRVC). The drive circuit arrangement (DRVC) is configured to receive a first half-bridge input signal (Sin) and a second half-bridge input signal (Sina), drive the first transistor device (1) and the second electronic switch (31a) based on the first half-bridge input signal (Sin), and drive the second transistor device (1a) and the first electronic switch (31) based on the second half-bridge input signal (Sina).

Hybrid power devices

A device includes a first switch and a first diode connected in parallel between a midpoint and a first terminal of the hybrid power device, a second switch and a second diode connected in parallel between the midpoint and a second terminal of the hybrid power device, a third switch coupled between the first terminal and the second terminal, and a third diode connected between the first terminal and the second terminal.

Hybrid power devices

A device includes a first switch and a first diode connected in parallel between a midpoint and a first terminal of the hybrid power device, a second switch and a second diode connected in parallel between the midpoint and a second terminal of the hybrid power device, a third switch coupled between the first terminal and the second terminal, and a third diode connected between the first terminal and the second terminal.

HYBRID DIODE SILICON ON INSULATOR FRONT END MODULE AND RELATED METHOD
20230144335 · 2023-05-11 ·

A hybrid diode silicon on insulator front end module and related method are provided. The front end module includes a transmit branch that includes a transmit circuit and a receive branch that includes a receive circuit. The receive circuit includes a low noise amplifier, a pin diode including an anode and a cathode; and a switch. The anode of the pin diode is operatively connected to an antenna switch port and an input voltage source. The cathode of the pin diode is operatively connected to a cathode of the switch. Turning on the switch facilitates a drainage of residual electrical current at the pin diode.

Driver circuit for switching edge modulation of a power switch
11646730 · 2023-05-09 · ·

A driver circuit for switching edge modulation of a power switch. The driver circuit includes a first driver circuit input including a downstream input node, and a power switch including an upstream first gate node. A charging path including a charging resistor is situated between the input node and the first gate node. A discharging path including a discharging resistor is situated between the input node and the first gate node. A gate path is situated between the input node and the first gate node. A power switch transistor, whose gate is connected to the first gate node, is provided. A gate path includes a gate resistor. The driver circuit is configured so that, during a switching process of the power switch, the gate path is temporarily short-circuited either via the charging path or the discharging path, to increase the slope of the switching behavior of the power switch.