A driver circuit for switching edge modulation of a power switch. The driver circuit includes a first driver circuit input including a downstream input node, and a power switch including an upstream first gate node. A charging path including a charging resistor is situated between the input node and the first gate node. A discharging path including a discharging resistor is situated between the input node and the first gate node. A gate path is situated between the input node and the first gate node. A power switch transistor, whose gate is connected to the first gate node, is provided. A gate path includes a gate resistor. The driver circuit is configured so that, during a switching process of the power switch, the gate path is temporarily short-circuited either via the charging path or the discharging path, to increase the slope of the switching behavior of the power switch.

A control device for connecting between two portions of an electrical power supply line. The device includes a bipolar transistor including a wide bandgap semiconductor material and having its emitter connected to one portion of the power supply line, its collector connected to another portion of the power supply line, and the device also including control connected to the base of the transistor.

A control device for connecting between two portions of an electrical power supply line. The device includes a bipolar transistor including a wide bandgap semiconductor material and having its emitter connected to one portion of the power supply line, its collector connected to another portion of the power supply line, and the device also including control connected to the base of the transistor.

A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.

A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.

It is an object of the present invention to provide a buffer circuit that reduces a reverse voltage applied to transistors being a complementary pair during turn-on and turn-off. A buffer circuit is a buffer circuit that turns on and turns off a switching element and includes a drive-side element that has an end connected to a base of a drive transistor and a sink-side element that has an end connected to a base of a sink transistor. The drive-side element and the sink-side element are respectively a drive-side diode and a sink-side diode, or a drive-side capacitor and a sink-side capacitor.

It is an object of the present invention to provide a buffer circuit that reduces a reverse voltage applied to transistors being a complementary pair during turn-on and turn-off. A buffer circuit is a buffer circuit that turns on and turns off a switching element and includes a drive-side element that has an end connected to a base of a drive transistor and a sink-side element that has an end connected to a base of a sink transistor. The drive-side element and the sink-side element are respectively a drive-side diode and a sink-side diode, or a drive-side capacitor and a sink-side capacitor.

A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.

A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.

A multiple-level driver circuit, such as for providing several different signals to a device under test (DUT) in an automated test system, can include multiple diode bridge circuits. In an example, a first diode bridge circuit is configured to receive a multiple-valued input voltage signal, having at least two different DC voltage signal levels, at an input node and, in response, to selectively provide a corresponding multiple-valued output voltage signal at an output node. The first diode bridge circuit can operate in a conducting and non-commutated state when it is used to selectively provide the multiple-valued output voltage signal at the output node.