A thyristor-based dc solid state circuit breaker (SSCB) named Y-type includes a new complementary commutation circuit including a capacitor-capacitor pair, which features three advantages. First, a fast commutation is achieved using a countercurrent pulse injection by the capacitor-capacitor pair structure. Second, metal-oxide varistors (MOVs) are disconnected from the power line when SSCB is OFF, which solves the reliability issue due to the MOV degradation and enhances the voltage utilization rate of the main switch. Third, benefiting from the capacitor-capacitor pair structure, reliable reclosing and rebreaking are obtained for practical applications.

A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by V.sub.th, a maximum rated gate voltage of the normally-off transistor is denoted by V.sub.g_max, a voltage of the fourth end portion is denoted by V.sub.g_on, the first capacitance component is denoted by C.sub.a, and the second capacitance component is denoted by C.sub.b, V.sub.th<(C.sub.b/(C.sub.a+C.sub.b))V.sub.g_on<V.sub.g_max.

A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by V.sub.th, a maximum rated gate voltage of the normally-off transistor is denoted by V.sub.g_max, a voltage of the fourth end portion is denoted by V.sub.g_on, the first capacitance component is denoted by C.sub.a, and the second capacitance component is denoted by C.sub.b, V.sub.th<(C.sub.b/(C.sub.a+C.sub.b))V.sub.g_on<V.sub.g_max.

Switching circuitry includes first and second transistors in series between two terminals and including a common control node with a capacitance between the common control node and an intermediate point. A control circuit includes first and second circuits configured to charge and discharge the capacitance as a function of first and second control signals. The control circuit includes a third circuit having a plurality of diodes and a switch that operates when the voltage at the capacitance is greater than a threshold two diodes in cascade between the intermediate point and the common control node to enable current flow from the intermediate point to the common control node. When the voltage at the capacitance is smaller than the given threshold two diodes are connected in series between the common control node and the intermediate point to enable current flow from the common control node to the intermediate point.

Switching circuitry includes first and second transistors in series between two terminals and including a common control node with a capacitance between the common control node and an intermediate point. A control circuit includes first and second circuits configured to charge and discharge the capacitance as a function of first and second control signals. The control circuit includes a third circuit having a plurality of diodes and a switch that operates when the voltage at the capacitance is greater than a threshold two diodes in cascade between the intermediate point and the common control node to enable current flow from the intermediate point to the common control node. When the voltage at the capacitance is smaller than the given threshold two diodes are connected in series between the common control node and the intermediate point to enable current flow from the common control node to the intermediate point.

An electronically switchable diplexer (200), especially an electronically switchable diplexer (200) with low video crosstalk, comprises a low-pass terminal (210), a terminal (220) for feeding in a first control signal, a common terminal (230), a high-pass terminal (240), and a terminal (250) for feeding in a second control signal, wherein the low-pass path of the diplexer (200) operates down to DC (direct current).

An electronically switchable diplexer (200), especially an electronically switchable diplexer (200) with low video crosstalk, comprises a low-pass terminal (210), a terminal (220) for feeding in a first control signal, a common terminal (230), a high-pass terminal (240), and a terminal (250) for feeding in a second control signal, wherein the low-pass path of the diplexer (200) operates down to DC (direct current).

According to one aspect, embodiments herein provide a power switching circuit, comprising a first terminal, a second terminal, a third terminal, and a plurality of switching devices, each switching device having a first transistor having a first gate, a first source, and a first drain, a second transistor having a second gate, a second source, a second drain coupled to the first source, and a bipolar body diode coupled between the second drain and the second source, and a unipolar diode configured to prevent a transition voltage applied across the first gate and the first source from exceeding a degradation threshold of the first transistor during a transition period, wherein a first switching device of the plurality of switching devices is coupled between the first and third terminals and the and a second switching device of the plurality of switching devices is coupled between the second and third terminals.

A power delivery system includes a controller, configured to receive a voltage indication signal indicating a measured voltage of a battery management system and to determine whether first and second diodes of the battery management system are faulty based on the voltage indication signal. The controller is also configured to respectively receive first and second current indication signals from first and second current sensors of the battery management system and to determine whether the first and second diodes of the first battery management system are faulty based on the first and second current indication signals.

A power delivery system includes a controller, configured to receive a voltage indication signal indicating a measured voltage of a battery management system and to determine whether first and second diodes of the battery management system are faulty based on the voltage indication signal. The controller is also configured to respectively receive first and second current indication signals from first and second current sensors of the battery management system and to determine whether the first and second diodes of the first battery management system are faulty based on the first and second current indication signals.