A dynamic high-resolution ADC according to an example embodiment may include a dynamic amplifier configured to amplify, by as much as a first gain, the sampled-and-held analog signal received from the sample and hold circuit; DAC configured to convert a digital signal input from a decoder into an analog signal; a residue signal amplifier connected to the dynamic amplifier and the DAC and configured to calculate a difference between an output signal of the dynamic amplifier and an output signal of the DAC and amplify the difference by as much as a second gain; an ADC connected to the residue signal amplifier and configured to convert an output signal of the residue signal amplifier into a digital signal; and a decoder connected to the ADC and configured to decode, into digital data, an output signal of the ADC input by the ADC.

A digital-to-analog converter (DAC) comprises circuitry configured to generate, based on a mapping, L signals representing an N-bit digital input, wherein N and L are positive integers, and wherein N<L<2.sup.N−1, and circuitry configured to control current flow from L weighted current sources using the L respective signals, thereby generating an analog output that uniquely represents the N-bit digital input, wherein the weighted current sources have weights configured to minimize at least one error metric associated with the analog output.

A digital-to-analog converter (DAC) comprises circuitry configured to generate, based on a mapping, L signals representing an N-bit digital input, wherein N and L are positive integers, and wherein N<L<2.sup.N−1, and circuitry configured to control current flow from L weighted current sources using the L respective signals, thereby generating an analog output that uniquely represents the N-bit digital input, wherein the weighted current sources have weights configured to minimize at least one error metric associated with the analog output.

In accordance with an embodiment, a method for digital-to-analog conversion includes: mapping a uniformly distributed input code to a non-uniformly distributed input code of a switched capacitor digital-to-analog converter (DAC), the non-uniformly distributed input code including a most significant code (MSC) and a least significant code (LSC); transferring a first charge from a set of DAC capacitors to a charge accumulator based on the MSC; forming a second charge based on the LSC; and transferring the second charge from the set of DAC capacitors to the charge accumulator, where each capacitor of the set of DAC capacitors is used for each value of the non-uniformly distributed input code, each capacitor of the set of DAC capacitors provides a same corresponding nominal charge within each value of the non-uniformly distributed input code, and where the same nominal charge is proportional to a value of the non-uniformly distributed input code.

A coupling harness, including a coupling clamp, for capturing a coupled signal from signal lines is provided. The coupling harness has an orientation detector that determines whether the coupled signal needs to be complemented based on an orientation of the coupling clamp relative to the signal lines. A logic corrector complements the coupled signal based on an output of the orientation detector. Advantageously, signals may be coupled correctly from signal lines regardless of the orientation of the coupling clamp.

A 10BASE-T transmitter includes a Manchester encoder circuit, a waveform shaper circuit, and digital-to-analog converter (DAC) circuit. The Manchester encoder circuit applies Manchester encoding to an input data to generate an encoded data. The waveform shaper circuit converts the encoded data into a plurality of digital codes. The DAC circuit generates a transmit (TX) waveform according to the plurality of digital codes. The waveform shaper circuit controls a portion of the plurality of digital codes for applying pre-compensation of inter-symbol interference (ISI) to the TX waveform.

An electricity usage monitor may include a coupling component to couple the electricity usage monitor to monitor an electrical circuit, a meter to measure electricity usage of the electrical circuit, an encoder to receive, from the meter, an electricity usage measurement to generate a measurement transmission based on the electricity usage measurement, and a communication interface configured to receive the measurement transmission from the encoder and to transmit the measurement transmission into a communication network for communication to a destination on the communication network.

Digital to analog converter generates an analog output corresponding to a digital input by controlling DAC cells using bits of the digital input. The DAC cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the DAC cells may have duty cycle error or mismatches. To compensate for the duty cycle error of a DAC cell, a small amount of charge is injected into a low-impedance node of a DAC cell when the data signal driving the DAC cell transitions, or changes state. The small amount of charge is generated using a capacitive T-network, and the polarity of the charge injected is opposite of the error charge caused by duty cycle error. The opposite amount of charge thus compensates or cancels out the duty cycle error, and duty cycle error present at the output of the DAC cell is reduced.

In accordance with an embodiment, a method for digital-to-analog conversion includes: mapping a uniformly distributed input code to a non-uniformly distributed input code of a switched capacitor digital-to-analog converter (DAC), the non-uniformly distributed input code including a most significant code (MSC) and a least significant code (LSC); transferring a first charge from a set of DAC capacitors to a charge accumulator based on the MSC; forming a second charge based on the LSC; and transferring the second charge from the set of DAC capacitors to the charge accumulator, where each capacitor of the set of DAC capacitors is used for each value of the non-uniformly distributed input code, each capacitor of the set of DAC capacitors provides a same corresponding nominal charge within each value of the non-uniformly distributed input code, and where the same nominal charge is proportional to a value of the non-uniformly distributed input code.

A circuit includes a digital-to-analog converter (DAC) and a compensation circuit. The DAC has a first terminal and a second terminal. The compensation circuit has a third terminal and a fourth terminal. The third terminal is coupled to the first terminal, and the fourth terminal is coupled to the second terminal. The compensation circuit is configured to source current into the first terminal responsive to an increase in voltage on the second terminal, and to sink current from the first terminal responsive to a decrease in voltage on the second terminal.