An encoding circuit includes: a polar encoding unit capable of encoding a polar code of N bits; a frozen bit adding unit that generates a first sequence by adding frozen bits to an input signal; and a bit arrangement changing unit that: generates a second sequence of N bits by arranging the first sequence in the second sequence according to an arrangement rule dependent on a ratio of N.sub.t bits, being a code length of a polar code to be encoded and being N bits or less, and N bits, and setting bit values at bit positions other than positions where the first sequence is arranged in the second sequence to zero when N.sub.t bits are less than N bits; and inputs the second sequence to the polar encoding unit. A code word of N.sub.t bits is generated by thinning processing based on a result of encoding the second sequence.

A decoding module for a communication device includes a first calculation circuit, outputting the larger between a first parameter and a second parameter as a first output parameter; a first arithmetic circuit, calculating a first product of a third parameter and a first slope, and a first difference between a first constant and the first product; a second arithmetic circuit, calculating a second product of the third parameter and a second slope, and a second difference between a second constant and the second product; a second calculation circuit, selecting the largest among a third constant, the first difference and the second difference and generating a second output parameter, wherein the third constant is zero; and an addition circuit, adding the first output parameter and the second output parameter to generate output information, according to which the communication device determines a data bit.

There is described a method for communicating data, the method comprising: receiving an incomplete data stream, wherein the incomplete data stream comprises a plurality of sequences of data points having respective values and a plurality of sequences of missing data points; receiving a missing data model; determining values for each of the plurality of sequences of missing data points, comprising: selecting a sequence of missing data points that has not previously been processed, wherein the sequence of missing data points to be processed is selected as a smallest sequence of missing data points of the plurality of sequences of missing data points that have not previously been processed; processing the incomplete data stream to determine values for the selected sequence of missing data points based upon the missing data model; updating the incomplete data stream to include the determined values for the selected sequence of missing data points; and wherein values for subsequent sequences of missing data points are generated based upon the updated data stream; and outputting a corrected data stream comprising the determined values for each of the plurality of sequences of missing data points.

With rapid increase in wired/wireless communication traffic and data storage requirements, the performance of error correction codes and data security solutions is become crucial. Random-like codes can be used in symmetric data encryption, cryptographic hash functions, random number/sequence generators, error correction and detection codes, and other data security applications. The present disclosure provides systems and methods that implement a dynamic permutation based coding approach of input based permutation/remapping/repositioning sequence generation. As the encoding process is defined using input bits, the output of the proposed codes depends on the statistic of input bits rather than any fixed predefined encoding structure. This dynamic encoding method can facilitate to implement strong confusion-diffusion logic and randomness in symmetric cryptography, hash functions, error correction codes, and other data security and authentication areas.

A selective PEG algorithm, creating a sparse matrix while maintaining row weight/column weight at arbitrary multi-levels, and in the process, inactivating an arbitrary edge so that a minimum loop formed between arbitrary nodes is enlarged or performing constrained interleaving, so that encoding efficiency in the case where a matrix space is narrow is improved.

A method for extending a polar code by determining an extension number E such that E/2<N<E whereby N is a number of codeword bits for a polar code that is to be extended and extending a codeword by adding additional redundant/extension bits. Information indicative of a bit unreliability associated with each bit in the codeword is accessed and bit positions with the highest unreliabilities are selected. Input data for an extended codeword is determined by adding a number of redundant bits in the respective selected bit positions.

1. A method comprising: receiving input data including an array of information bits in a number equal to a first number, and encoding, through a polar code, said input data into a codeword having an array of codeword bits in a number equal to a second number, the codeword bits including said information bits and a plurality of frozen bits;
wherein said encoding comprises: determining a third number as the lowest power of two number that is higher than said second number; accessing an information content indicative of a bit unreliability associated with each bit position in said array of codeword bits; selecting, among the bit positions in the information content, the bit positions associated with a number of highest bit unreliabilities equal to a fourth number, to obtain selected bit positions, said fourth number being equal to a difference between the third number and the second number; determining extended input data by adding to the input data a number of redundant bits equal to said fourth number, wherein said adding comprises adding, in the input data, the number of redundant bits in the respective selected bit positions; through the polar code, encoding the extended input data and a number of frozen bits equal to a difference between the second number and the first number, thereby obtaining an extended codeword including said codeword; wherein the method further comprises, after said decoding, deleting said added number of redundant bits in order to obtain output data corresponding to the input data.

Semiconductor devices, packaging architectures and associated methods are disclosed. In one embodiment, a multi-chip module (MCM) is disclosed. The MCM includes a first integrated circuit (IC) chip including a first interface defining a first number of interface contacts. Conversion circuitry receives a first full set of signals associated with the first interface and to omit a subset of the full set of signals to generate a reduced set of signals. Serialization circuitry serializes the reduced set of signals to generate a serialized set of signals. A second interface transmits the serialized set of signals with a second number of interface contacts that is less than the first number of interface contacts. A logic IC chip includes a third interface coupled to the second interface via a set of links and configured to match the second interface. Deserialization circuitry deserializes the serialized set of signals. Reconversion circuitry recreates signals corresponding to the omitted subset of the full set of signals and aggregates the recreated signals with the deserialized signals to form a second full set of signals that correspond to the first full set of signals.

Provided is a quantum error correction code generating method using a graph state. According to the exemplary embodiment of the present invention, a quantum error correction code generating method using a graph state: includes: generating a graph state representing an adjacency relationship between a plurality of qubits including at least one entangled qubit (ebit); generating a first stabilizer generator which corresponds to the graph state and is configured by a plurality of stabilizers for detecting errors of the plurality of qubits; and generating at least one logical Z operator used for a phase flip operation of a codeword, at least one logical X operator used for a bit flip operation of a codeword, and a second stabilizer generator which is a sub set of the first stabilizer generator, based on the first stabilizer generator and the at least one entangled qubit.

Systems and methods are disclosed for decoding data. A first block of data may be obtained from a storage medium or received from a computing device. The first block of data includes a first codeword generated based on an error correction code. A first set of likelihood values is obtained from a neural network. The first set of likelihood values indicates probabilities that the first codeword will be decoded into one of a plurality of decoded values. A second set of likelihood values is obtained from a decoder based on the first block of data. The second set of likelihood values indicates probabilities that the first codeword will be decoded into one of the plurality of decoded values. The first codeword is decoded to obtain a decoded value based on the first set of likelihood values and the second set of likelihood values.