H03M13/618

LOW DENSITY PARITY CHECK ENCODER HAVING LENGTH OF 64800 AND CODE RATE OF 7/15, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME
20220360282 · 2022-11-10 ·

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).

Method and apparatus for encoding and decoding LDPC codes

Certain aspects of the present disclosure provide an efficiently decodable QC-LDPC code which is based on a base matrix, the base matrix being formed by columns and rows, the columns being dividable into one or more columns corresponding to punctured variable nodes and columns corresponding to non-punctured variable nodes. Apparatus at a transmitting side includes a encoder configured to encode a sequence of information bits based on the base matrix. Apparatus at a receiving side configured to receive a codeword in accordance with a radio technology across a wireless channel. The apparatus at the receiving side includes a decoder configured to decode the codeword based on the base matrix.

Electronic device with bit pattern generation, integrated circuit and method for polar coding

An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t=┌n/w┐) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t=┌n/w┐) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (b.sub.k,n) in each successive t=┌n/w┐ clock cycle; where the bit pattern vector comprises n bits, of which ‘k’ bits adopt a first binary value and n−k bits adopt a complementary binary value.

Method and device for transmitting data

Embodiments of this application provide a method for processing information bits in a wireless communication network. A device obtains a Polar encoded bit sequence, then divide the Polar encoded bit sequence into g groups that are of equal length N/g, wherein g is 32. The device block interleaves the g groups to obtain an interleaved bit sequence according to a sequence S, wherein the sequence S comprises: group numbers of the g groups, wherein a group whose number is 0 is the first element in the sequence S, wherein a group whose number is 12 is the 17.sup.th element in the sequence S, wherein a group whose number is 31 is the 32.sup.nd element in the sequence S, wherein the S is an integer and output the interleaved bit sequence.

Encoding method, decoding method, apparatus, and device

Embodiments of the present disclosure provide a rate matching method and an apparatus. The method includes performing, by a sending apparatus, encoding using a polar code to obtain a first encoded sequence whose length is N. A sequence number of a polarization channel may range from 0 to N−1. The method includes determining, by the sending apparatus, P1 to-be-punctured bit positions. The method includes performing puncturing at the P1 bit positions in the first encoded sequence to obtain rate-matched encoded bits. The P1 to-be-punctured bit positions are bit positions corresponding to polarization channels 0 to P.sub.T1−1, P.sub.T1 to 3N/8−1, and/or N/2 to 5N/8−1, P.sub.T1 is a threshold of a quantity of to-be-punctured bit positions, and P.sub.T1≤N/4. The method includes sending the rate-matched encoded bits.

Method and device for rate matching and polar encoding

The present disclosure provides an encoding method and apparatus, and relates to the field of communications technologies, to reduce an encoding latency and complexity, and the amount of computation of real-time construction. The encoding method includes: obtaining information bits; determining a puncturing pattern, where the puncturing pattern includes an element in a puncturing set and an element in a shortening set, and the puncturing set and the shortening set have no intersection set; and performing, by using the determined puncturing pattern, rate matching on data obtained after the information bits are encoded.

Method and apparatus for data transmission mitigating interwire crosstalk

Data transmission mitigating interwire crosstalk including: dividing a data block to be transmitted from a transmitter to a receiver across a set of signal wires into sub-blocks; encoding each of the sub-blocks into a plurality of codewords; selecting, for each sub-block by a cost function, one of the codewords that is less likely to introduce interwire crosstalk; transmitting the selected codewords; and updating the cost function at the transmitter with feedback from the receiver.

APPARATUS AND METHOD FOR CHANNEL CODING IN COMMUNICATION SYSTEM
20220352903 · 2022-11-03 ·

This application relates to communicating information between communication devices. A channel coding method is disclosed. A communication device obtains an input sequence of K bits. The communication device encodes the input sequence using a low density parity check (LDPC) matrix H, to obtain an encoded sequence. The LDPC matrix H is determined according to a base matrix and a lifting factor Z. The base matrix includes m rows and n columns, m is greater than or equal to 5, and n is greater than or equal to 27. The lifting factor Z satisfies a relationship of 22*Z≥K. According to the encoding method provided in the embodiments, information bit sequences of a plurality of lengths can be encoded for transmission between the communication devices.

DETECTION OF MULTIPLE BIT ERRORS IN RANDOM ACCESS MEMORIES
20170315862 · 2017-11-02 ·

In one embodiment, a method includes reading a codeword stored to a memory, computing a syndrome word based on a product of the codeword and a parity check matrix derived from a linear block code, setting a flag to a first value indicating that the codeword includes no errors in response to a first determination requiring that the syndrome word is an all-zero vector, setting the flag to a second value indicating that the codeword includes exactly one single-bit error in response to a second determination requiring that the syndrome word equals a column of the parity check matrix, setting the flag to a third value indicating that the codeword includes an odd number of multiple bit errors in response to a third determination, and setting the flag to a fourth value indicating that the codeword includes an even number of multiple bit errors in response to a fourth determination.

Apparatus and method for transmitting and receiving a quasi-cyclic low density parity check code in a multimedia communication system

A method and apparatus are provided for transmitting an LDPC code in a multimedia system. The method includes generating an LDPC code based on a resulting parity check matrix which is generated by performing a row splitting operation on a base parity check matrix; and transmitting the LDPC code. The row splitting operation includes splitting each row block included in the base parity check matrix into row blocks, a number of the row blocks is determined based on a splitting factor, and the splitting factor is determined based on a number of repair symbols included in a repair symbol block of the base parity check matrix, a number of rows included in the base parity check matrix, and a scaling factor for determining a size of each permutation matrix in the resulting parity check matrix and a size of each zero matrix included in the resulting parity check matrix.