A display device includes a driving substrate, a front panel laminate, a circuit board, a front protective layer, and a glue. The front panel laminate is disposed on the driving substrate and includes a display medium layer. The circuit board is disposed on an end of the driving substrate. The front protective layer is disposed on the front panel laminate. The front protective layer has a notch. An end of the circuit board is in the notch. The end of the circuit board and the front protective layer have a first gap therebetween. The glue is filled in the first gap. A normal projection of the glue on the driving substrate overlaps a normal projection of the circuit board on the driving substrate and overlaps a normal projection of the front protective layer on the driving substrate.

An electronic device includes: a host box comprising a host processor configured to control an operation of the electronic device, a host motherboard in which the host processor is disposed, and a host power supply unit (PSU) configured to supply power to a component connected to the host motherboard; and one or more extension boxes controlled by the host box, wherein each of the one or more extension boxes comprises an extension motherboard independent of the host box, and an extension PSU independent of the host box and configured to supply power to a component connected to the extension motherboard.

A flexible circuit board, a method for manufacturing the flexible circuit board, and a display device are provided. The flexible circuit board includes: a plurality of driving signal lines arranged with mutually insulate-gates, wherein the driving signal lines comprise at least two voltage signal lines arranged adjacent to each other; at least one isolation protecting line, the isolation protecting line being located between the two voltage signal lines arranged adjacent to each other.

The invention relates to a conducting track fuse (1) for an electrical or electronic device, comprising: a first and a second connection region (2a, 2b); a nonlinearly extending burn-out region (3), which is arranged between the first and second connection regions (2a, 2b); and a covering element (15), which has at least two side walls (9) and a covering face (8), which covering element is arranged over the first and second connection regions (2a, 2b) and over the burn-out region (3), the burn-out region (3) and the covering element (5) being arranged relative to each other in such a way that the area of the covering face (8) covers the burn-out region (3) and a cavity (7) is formed between the burn-out region (3) and the covering face (8) as a result of the height of the side walls (9).

A device that includes a board, a package and a patch substrate. The board includes a cavity. The package is coupled to a first side of the board. The package includes a substrate and an integrated device coupled to the substrate. The integrated device is located at least partially in the cavity of the board. The patch substrate is coupled to a second side of the board. The patch substrate is located over the cavity of the board. The patch substrate is configured as an electromagnetic interference (EMI) shield for the package.

The present invention relates to a power module (1) having reduced intrinsic inductance, comprising an at least partially electrically insulating layer (3) that has a first side (3a) on which a power electronics unit (2) is arranged and a second side (3b) which is opposite the first side (3a), a compensation layer (10) being arranged on the second side (3b), which compensation layer is electrically conductive and to which compensation layer an electric potential can be applied. The invention also relates to a method for producing a power module, preferably a power module as described above.

A multi-layered board includes: a middle conductive layer; a first dielectric layer that is disposed directly on a first surface of the middle conductive layer; a second dielectric layer that is disposed directly on a second surface of the middle conductive layer; a first outer surface conductive layer that is disposed directly on an outer side of the first dielectric layer; and a second outer surface conductive layer that is disposed directly on an outer side of the second dielectric layer. The first outer surface conductive layer serves as a first outer surface of the multi-layered board, and the second outer surface conductive layer serves as a second outer surface of the multi-layered board. The middle conductive layer is solidly formed over an entire planar direction of the multi-layered board. The first dielectric layer and the second dielectric layer each independently have a thickness variation of 15% or less.

Disclosed is a PCB of a planar transformer including: a PCB substrate with a through hole and a double-sided winding part formed on double sides of the PCB substrate, wherein the double-sided winding part is of a symmetric structure, a via hole consistent with the through hole is formed in the center of the double-sided winding part, the via hole is aligned to the through hole to form a magnetic core hole, and the circumference of the via hole is raised to form wire blocking parts; and forming a wire passing groove in the wall of the magnetic core hole, wherein the wire passing groove allows a metal conducting wire to pass through to be planarly wound from inside to outside on double sides of the double-sided winding part at the same time so as to form two coils in series located on the double sides of the PCB substrate.

A robot includes a spin body, and a drive motor, a spin motor, and a PCB connected electrically to the spin motor and the drive motor mounted on the spin body. Accordingly, the spin motor, the driving motor, and the PCB are rotated together with the spin body, so that relative movement does not occur between the PCB and the respective motors, and tangling or twisting of the connection member electrically connecting the respective motors and the PCB does not occur.

A high-frequency module (1a) includes a multilayer wiring substrate (2), a plurality of components (3a, 3b) mounted on an upper surface (20a) of the multilayer wiring substrate (2), a sealing resin layer (4) laminated on the upper surface (20a) of the multilayer wiring substrate (2) and sealing the plurality of components (3a, 3b), and a shield (5). The shield (5) is composed of shield walls (5a, 5b) arranged in grooves (12) and (13), respectively, formed between the first component (3a) and the second component (3b) in the sealing resin layer (4) and a connecting conductor (11) coupling both the shield walls (5a, 5b). A first region (40a) and a second region (40b) in the sealing resin layer (4) split by the shield (5) are contiguous at the location of the connecting conductor (11) as seen from a direction perpendicular to the upper surface (20a) of the multilayer wiring substrate (2).