A semiconductor package includes a semiconductor chip and a package substrate. The semiconductor chip is mounted on the package substrate. The package substrate includes a dielectric layer through which a vent hole penetrates, trace patterns disposed on the dielectric layer, and a protecting block disposed between the trace patterns and the vent hole.

A backplane is for electrically connecting electrical components. An embodiment is directed to the backplane and to a method for producing the same. An embodiment of the backplane includes a carrier plate, conductor tracks, which extend on and/or in the carrier plate, and at least one cooling element arranged on a conductor track for cooling the conductor track.

Provided is a circuit structure having a novel structure with which the dissipation of heat from a heat generating component can be more reliably promoted with a short heat transfer path. A circuit structure includes: a heat generating component; bus bars connected to connection portions of the heat generating component; an insulating base member configured to hold the heat generating component and the bus bars; and a coolant flow path provided inside the base member and through which a coolant flows, the bus bars being in thermal contact with the coolant flow path.

Printed circuit board (PCB) substrates include at least one pre-preg layer interposed between one or more electrically conductive layers, power device stacks, each having a power device embedded within the PCB substrate in a vertical stack configuration, and a flat heat pipe positioned between the power device stacks within the at least one pre-preg layer, one surface of the flat heat pipe directly bonded to a first one of the power device stacks and an opposite surface of the flat heat pipe thermally coupled to a second one of the power device stacks.

The present invention relates to a carrier substrate (30) comprising signal vias (41) for electrically interconnecting components (10, 31) arranged on opposing sides of the carrier substrate (30). The carrier substrate (30) further comprises: at least one cavity (20) embedded in the carrier substrate (30) having at least one chamber wick part (24) and a working fluid, and wherein the at least one cavity (20) at least partially encompass the signal vias (41). The present invention also relates to an electronic assembly and an apparatus for wireless communication comprising the carrier substrate (30).

A component carrier with a stack that has at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and a highly-conductive block embedded in the stack and being thermally and/or electrically coupled with the semiconductor component is illustrated and described.

The present invention presents a method of fabrication for a physiological sensor with electronic, electrochemical, and chemical components. The fabrication method comprises steps for manufacturing an apparatus comprising at least one electrochemical sensor, a microcontroller, and a transceiver. The fabrication process includes the steps of substrate fabrication, circuit fabrication, pick and place, reflow soldering, electrode fabrication, membrane fabrication, sealing and curing, layer bonding, and dressing. The physiological sensor is operable to analyze biological fluids such as sweat.

The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.

A multi-board mid-plane includes a disk backplane board (DBB) having a front side and a rear side. Venting holes are provided within the DBB extending between the front side of the DBB and the rear side of the DBB. The multi-board mid-plane also includes a controller backplane board (CBB) having a front side and a rear side. The front side of the CBB includes venting holes provided within the CBB extending between the front side of the CBB and the rear side of the CBB. A top fabric plane board (TFPB) and a bottom fabric plane board (BFPB) are provided for connecting the DBB with the CBB. A combination of the DBB and the CBB has a venting ratio that is equal to a lower of the venting ratio of the DBB and the venting ratio of the CBB.

A high-resolution substrate having an area of at least 100 square centimeters and selected traces having a line/space dimension of 2 micrometers or less is employed to integrate multiple independently operable clusters of flip chip mounted components, thereby creating a circuit assembly. Each independently operable cluster of components preferably includes a power distribution chip, a test/monitor chip, and at least one redundant chip for each type of logic device and for each type of memory device. The components in at least one of the independently operable clusters of components may include the components provided in a commercially available chiplet assembly. An electronic system may comprise multiple substrates comprising independently operable clusters of components, plus a motherboard, a system controller, and a system input/output connector.