A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.

A mounting device for mounting electronic components, wherein the mounting device comprises an electrically conductive structure having a first value of thermal expansion in at least one pre-defined spatial direction, an electrically insulating structure having a second value of thermal expansion in the at least one pre-defined spatial direction being different from the first value and being arranged on the electrically conductive structure, and a thermal expansion adjustment structure having a third value of thermal expansion in the at least one pre-defined spatial direction, wherein the third value is selected and the thermal expansion adjustment structure is located so that thermally induced warpage of the mounting device resulting from a difference between the first value and the second value is at least partially compensated by the thermal expansion adjustment structure.

A apparatus comprising a printed circuit board (“PCB”). The PCB comprises a first insulating layer and a second insulating layer. The first insulating layer is made of a first material and the second insulating layer is made of a second material. The first material has a lower dissipation factor than the second material. The first material and second material have substantially similar dielectric constants.

A flexible sheet of light-emitting diode (LED) light emitters includes a support substrate having a thermally conductive material. The flexible sheet of LED light emitters also has an LED emitter sheet overlying the support substrate, and the LED emitter sheet including a plurality of LED light emitters. The flexible sheet of LED light emitters also has a flexible circuit sheet overlying the LED emitter sheet, and a phosphor sheet overlying the flexible circuit sheet. The phosphor sheet includes a wave-length converting material. The flexible sheet of LED light emitters also has a lens sheet overlying the phosphor sheet. The lens sheet includes a plurality of lenses.

The present disclosure is directed to a hybrid dielectric interconnect stack for a printed circuit board having a first dielectric layer with a first dielectric constant and a first dielectric loss tangent positioned over an intermediate layer, which includes a first dielectric sublayer with a first sublayer dielectric constant and a first sublayer dielectric loss tangent, an embedded conductive layer, and a second dielectric sublayer with a second sublayer dielectric constant and a second sublayer dielectric loss tangent, in which the embedded conductive layer is positioned between the first and second dielectric sublayers, and a second dielectric layer with a second dielectric constant and a second dielectric loss tangent, in which the intermediate layer is positioned between the first and second dielectric layers.

A thin circuit board (100) and a method of manufacturing the same, the thin circuit board (100) includes: a dielectric layer (40); an inner circuit substrate (30); and a metal layer (50) formed on at least one side of the inner circuit substrate (30). The metal layer (450) is covered by the dielectric layer (40). The dielectric layer (40) includes an outermost insulating layer (11) and a bonding structure (20) sandwiched between the inner circuit substrate (30) and the metal layer (50), the metal layer (50) is wrapped by the insulating layer (11) and the bonding structure (20).

A printed circuit board (PCB), comprising a first layer, the first layer comprising a first dielectric material substantially exclusively. The PCB also comprises a second layer, the second layer comprising the first dielectric material within a first region and a second dielectric material within a second region adjacent to first region. The first dielectric material has a first dielectric constant, a first coefficient of thermal expansion (CTE) and a first glass transition temperature (Tg). The second dielectric material has a second dielectric constant, a second CTE and a second Tg. The first dielectric constant is greater than the second dielectric constant. The first CTE is substantially equal to the second CTE; and the first Tg and the second Tg are greater than 150° C.

An apparatus is provided which comprises: a cavity made in a substrate of a printed circuit board (PCB); a plurality of solder balls embedded in the cavity; and a horizontal trace within the substrate, wherein the horizontal trace is partially directly under the plurality of solder balls and is coupled to the plurality of solder balls and another trace or via in the substrate such that a substrate region under the plurality of solder balls is independent of a stop layer under the cavity.

A wiring board includes a substrate including a first surface and a second surface located on an opposite side to the first surface, where the substrate has stretchability, an interconnection wire located adjacent to the first surface of the substrate, and a stress relaxation layer located between the first surface of the substrate and the interconnection wire, where the stress relaxation layer has a modulus of elasticity lower than that of the substrate.

A power device embedded PCB includes a printed circuit board having a first major surface separated by a thickness and opposite a second major surface and an embedded power device. The embedded power device may include a power semiconductor device, an electrically and thermally conductive substrate bonded to the power semiconductor device along a first surface of the electrically and thermally conductive substrate and bonded to an electrical insulation layer on a second surface of the electrically and thermally conductive substrate opposite the first surface and a thermally conductive substrate bonded to the electrical insulation layer on a surface opposite the bonded electrically and thermally conductive substrate. The power semiconductor device, the electrically and thermally conductive substrate, the electrical insulation layer, and the thermally conductive substrate are disposed within the printed circuit board. The thermally conductive substrate forms a bondable surface adjacent the second major surface of the printed circuit board.