An electronic device and oscillator structure are provided. The electronic device includes a printed circuit board, an oscillator configured to oscillate at a frequency corresponding to an operation clock of the electronic device, and a connection member disposed between the oscillator and the printed circuit board such that the oscillator is spaced apart from a surface of the printed circuit board to electrically connect the oscillator to the printed circuit board. The connection member includes a first pad part electrically connected to a terminal of the oscillator, a second pad part electrically connected to a pad of the printed circuit board, and at least one conductive pattern electrically connecting the first pad part and the second pad part.

An electronic component includes: a multilayer capacitor including a capacitor body and a pair of external electrodes, respectively disposed on external surfaces of the capacitor body in a first direction; and an interposer disposed below the multilayer capacitor and including an interposer body, a pair of via holes penetrating through the interposer body, and a pair of via electrodes, respectively disposed in the via holes to be connected to the pair of external electrodes, respectively. 0.24T≤t≤0.3T, where “T” is a maximum height of the multilayer capacitor and “t” is a maximum height of the interposer.

Embodiments of a silicon heat-dissipation package for compact electronic devices are described. In one aspect, a device includes first and second silicon cover plates. The first silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The second silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The first primary side of the second silicon cover plate includes an indentation configured to accommodate an electronic device therein. The first primary side of the second silicon cover plate is configured to mate with the second primary side of the first silicon cover plate when the first silicon cover plate and the second silicon cover plate are joined together with the electronic device sandwiched therebetween.

A wiring board includes an insulating substrate including a first surface and a mounting portion for an electronic component on the first surface, the insulating substrate having a rectangular shape in a plan view of the first surface; a via conductor located inside the insulating substrate and at a corner portion of the insulating substrate in a plane perspective, and extending in a thickness direction of the insulating substrate; a wiring conductor located on the first surface and connecting the mounting portion and the via conductor to each other; and a heat dissipation portion located inside the insulating substrate at a position overlapping the mounting portion in a plane perspective view, wherein the first surface includes, between the heat dissipation portion and the via conductor in a plane perspective view, a first region surrounded by the wiring conductor in a plan view.

An embodiment of a printed circuit board includes a first insulating layer, a metal layer disposed above the first insulating layer, a second insulating layer disposed above the metal layer, and signal lines disposed above the second insulating layer, the signal lines extending in a first direction and having line widths in a second direction perpendicular to the first direction. The metal layer has open areas overlapping the signal lines in a third direction perpendicular to the first and second directions. In another embodiment, the open areas are replaced with metal meshes.

A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals is the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.

A composite electronic component includes a composite body including a multilayer ceramic capacitor and a ceramic chip coupled to each other. The multilayer ceramic capacitor includes a first ceramic body and first and second external electrodes, and the ceramic chip is disposed below the multilayer ceramic capacitor and includes a second ceramic body having first and second terminal electrodes. The multilayer ceramic capacitor and the ceramic chip are coupled by solder disposed between the first and second external electrodes and the first and second terminal electrodes, and each angle (θ) defined by inner side surfaces of the solder, respectively disposed on inner ends of bent portions of the first and second terminal electrodes disposed on an upper surface of the second ceramic body, and an upper plane of the second ceramic body of the ceramic chip satisfies 45 degrees or less.

An electronic-element mounting package includes a wiring substrate having a first surface and a wiring pattern thereon; a base having a second surface and a through hole whose opening is on the second surface; a signal line penetrating the through hole and having a first end exposed from an opening of the through hole; and an insulating member between an inner surface of the through hole and the signal line and has an end portion and a main portion. The end portion has an end surface on a side of the opening of the through hole, and the main portion is farther from the opening of the through hole than the end portion. The electronic-element mounting package also has a conductive joining material with which the wiring pattern and the first end are joined. Permittivity of the end portion is larger than permittivity of the main portion.

Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.

Disclosed embodiments include folded, top-to-bottom interconnects that couple a die side of an integrated-circuit package substrate, to a board as a complement to a ball-grid array for a flip-chip-mounted integrated-circuit die on the die side. The folded, top-to-bottom interconnect is in a molded frame that forms a perimeter around an infield to receive at least one flip-chip IC die. Power, ground and I/O interconnections shunt around the package substrate, and such shunting includes voltage regulation that need not be routed through the package substrate.