Patent classifications
H05K2203/061
Circuit board and manufacturing method thereof and electronic device
A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.
APPARATUS, SYSTEM, AND METHOD FOR MITIGATING THE SWISS CHEESE EFFECT IN HIGH-CURRENT CIRCUIT BOARDS
A disclosed apparatus may be a circuit board that includes (1) a first unique sublaminate that includes a plurality of ground layers and a plurality of signal layers, (2) a second unique sublaminate that includes a plurality of power layers and another plurality of signal layers, and (3) a symmetry axis that bisects the circuit board between the first unique sublaminate and the second unique sublaminate, wherein the first unique sublaminate and the second unique sublaminate are distinct from one another. Various other apparatuses, systems, and methods are also disclosed.
Resin flow restriction process and structure
A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.
Component Carrier With Embedded IC Substrate Inlay, and Manufacturing Method
A component carrier, including a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure, a cavity in the stack, an inlay substrate at least partially embedded in the cavity. The inlay substrate includes a component and an IC substrate stacked one above the other, a first redistribution structure that electrically connects the component to a first component carrier main surface, and a second redistribution structure that electrically connects the IC substrate to a second component carrier main surface opposed to the first component carrier main surface.
CONDUCTIVE SUBSTRATE AND CARRIER PLATE WIRING STRUCTURE WITH FILTERING FUNCTION, AND MANUFACTURING METHOD OF SAME
A manufacturing method for a conductive substrate with a filtering function includes preparing a core layer and forming first and second conductive holes in the core layer, forming a sacrificial copper layer on the first conductive hole and on the core layer, forming a metal layer on the second conductive hole, forming a metal post in the first conductive hole, forming a lower insulating layer on the core layer, forming a lower insulative post in the second conductive hole, forming a magnet wrapping around the metal post to obtain a first conductive post, forming an upper insulating layer on the core layer, forming an upper insulative post in the second conductive hole to obtain a second conductive post, removing the upper insulating layer, the lower insulating layer, and the remaining sacrificial copper post layer, followed by flattening.
METHOD FOR MANUFACTURING COMPONENT EMBEDDED CIRCUIT BOARD
A component embedded circuit board includes a printed circuit board, a dielectric layer, and an antenna structure laminated in that order. The printed circuit board includes a first opening and a first circuit layer, and the first circuit layer includes at least one first connecting pad. A second opening is defined in the dielectric layer. A conductive structure is embedded in the dielectric layer. The second opening penetrates the dielectric layer. The antenna structure includes a first ground layer. A component is embedded in the first opening. One end of the conductive structure is connected to the first ground layer, and the other end of the conductive structure is connected to the first connecting pad. The second opening corresponds to the first opening. A gap is generated by the second opening and the component. A method for manufacturing the package circuit structure is also disclosed.
Electronic component module and method for manufacturing the same
An electronic component module includes a first board comprising a component insertion portion, at least one heat-generating component mounted on a first surface of the first board and in which at least a portion of an active surface is exposed through the component insertion portion, a radiating component inserted into the component insertion portion and mounted on the active surface of the heat-generating component, a second board mounted on a second surface of the first board and configured to electrically connect the first board to an external source, and a connection conductor disposed on an inactive surface of the radiating component and configured to allow contact between the inactive surface of the radiating component and a main board.
SUBSTRATE WITH ELECTRONIC COMPONENT EMBEDDED THEREIN
A substrate with an electronic component embedded therein includes: a core layer having a through-portion; an electronic component disposed in the through-portion; an encapsulant disposed on a lower surface of the core layer, disposed in at least a portion of the through-portion, and covering at least a portion of a lower surface of the electronic component; and a build-up structure disposed on an upper surface of the core layer, and including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers.
Circuit board structure and manufacturing method thereof
A circuit board structure includes a first dielectric layer, at least one first circuit layer, a second dielectric layer, and an insulating protection layer. The first circuit layer is mounted on the first dielectric layer, and includes at least one first circuit. The second dielectric layer is mounted on the first circuit layer, and includes at least one thermally conductive bump and at least one electrically conductive bump. The electrically conductive bump is electrically connected to the first circuit. The insulating protection layer is mounted on the second dielectric layer. The thermally conductive bump directly contacts the glass substrate. When lasering is applied to cut the glass substrate for de-bonding, the lasering heat energy can be absorbed and dissipated by the thermally conductive bump, resolving the problem of circuit de-bonding and raising the process yield. In addition, a manufacturing method of the circuit board structure is provided.
Embedding known-good component between known-good component carrier blocks with late formed electric connection structure
A method of manufacturing a component carrier, wherein the method comprises mounting a known-good component on or spaced with regard to a first known-good component carrier block, thereafter forming an electrically conductive connection structure on and/or in and/or spaced with regard to the first component carrier block, and embedding the component between the first component carrier block and a second known-good component carrier block.