A substrate bonding structure includes a first substrate including a first resin substrate that melts by heating, a second substrate having a second resin substrate that melts by heating, and an overlapping portion with the first substrate. The overlapping portion between the first substrate and the second substrate includes a hole continuously extending from the first substrate to the second substrate. The first substrate includes a melted portion of the first resin substrate around the hole, and the second substrate includes a melted portion of the second resin substrate around the hole. The first substrate and the second substrate are bonded to each other with a fused portion between the melted portion of the first resin substrate and the melted of the second resin substrate.

A wiring structure includes an upper conductive structure, a lower conductive structure and an intermediate layer. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The upper conductive structure is electrically connected to the lower conductive structure. The intermediate layer includes a plurality of sub-layers. Each of the sub-layers is formed from a polymeric material. A boundary is formed between two adjacent sub-layers.

A printed wiring board includes: a first insulating layer having a first surface and a second surface opposite from the first surface; a second insulating layer stacked on the first surface of the first insulating layer; and a conductor wiring interposed between the first insulating layer and the second insulating layer. The first insulating layer contains a liquid crystal polymer. The second insulating layer contains a cured product of a thermosetting composition, containing an inorganic filler and a thermosetting component, and a fibrous base member. A temperature, at which a decrease in the mass of the second insulating layer that has had its temperature increased at a temperature increase rate of 10° C./min from an initial-state temperature of 25° C. reaches 5% of its initial-state mass, is equal to or higher than 355° C.

A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

A method for manufacturing a multilayer printed wiring board includes: preparing a first wiring board that includes a circuit region formed with one or more signal lines on a main surface of a first insulating substrate; preparing a second wiring board that includes an electrically conductive layer on a main surface of a second insulating substrate; disposing a spacer at a position spaced apart from an outer edge of the circuit region by a predetermined distance along at least a part of the outer edge; disposing an adhesive layer on the circuit region so that a space is provided between the adhesive layer and the spacer; and laminating the first wiring board and the second wiring board for thermocompression bonding.

A multilayer printed circuit board is provided having a first conductive layer and a first plating resist selectively positioned within the first conductive layer. A second plating resist may be selectively positioned within a second conductive layer. A through hole extends through the first plating resist in the first conductive layer and the second plating resist in the second conductive layer. An interior surface of the through hole is plated with a conductive material except along a length between the first plating resist and the second plating resist. This forms a partitioned plated through hole having a first via segment electrically isolated from a second via segment.

A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.

A method includes forming a first redistribution line, forming a polymer layer including a first portion encircling the first redistribution line and a second portion overlapping the first redistribution line, forming a pair of differential transmission lines over and contacting the polymer layer, and molding the pair of differential transmission lines in a molding compound. The molding compound includes a first portion encircling the pair of differential transmission lines, and a second portion overlapping the pair of differential transmission lines. An electrical connector is formed over and electrically coupling to the pair of differential transmission lines.

A circuit substrate includes a substrate, a wire build-up layer structure, and an insulating layer. The substrate has a first surface and a second surface opposites to the first surface. The substrate includes a plurality of patterned pads. The patterned pads are disposed on the first surface of the substrate, and having contact openings. The wire build-up layer structure is disposed on the first surface of the substrate. The wire build-up layer structure includes an interconnect build-up layer and a plurality of conductive pillars. The conductive pillars electrically connect to the interconnect build-up layer and the patterned pads. The insulating layer is disposed between the substrate and the wire build-up layer structure.