Patent classifications
H05K2203/095
Redistribution plate
A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.
REDISTRIBUTION PLATE
A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.
Protective coating for electrical components and method of making the protective coating
A electronic component including a first protective layer covering the substrate and the conductive tract, a second protective layer covering at least a portion of the first protective layer, wherein the second protective layer includes Parylene, and a third protective layer covering at least a portion of the second protective layer.
Method and equipment for the treatment of panels
Description of a method and equipment for panel (900) treatment in the manufacture of printed circuit boards that includes the following phases: setting up a panel (900) with a first side (905), a second side (910) opposite the first side, and at least one through hole (915) in the thickness of the panel; positioning the opening (205) for an intake system (200) in contact with the first side (905) of the panel (900) so this opening (205) delimits a portion on the first side (905) containing the through hole (915); creating negative pressure within the intake system (200) and simultaneously exposing at least one portion on the second side (910) of this panel (900) to a flow of plasma, whereby this portion on the second side (910) contains the through hole (915).
PRODUCING METHOD OF WIRED CIRCUIT BOARD
Provided is a method for producing a wired circuit board in which a first preparation step of preparing a first substrate having an insulating layer and a conductive layer disposed on one surface of the insulating layer; a second preparation step of preparing a second substrate having a metal layer; a bonding step of laminating the first substrate and the second substrate so that the conductive layer and the metal layer are in contact with each other, and metal-bonding the conductive layer and the metal layer; and a patterning step of forming a conductive pattern on the other surface of the insulating layer are carried out.
ASSEMBLY TO BE USED IN AN INKJET PRINTER, INKJET PRINTER AND METHOD FOR PRINTING A FUNCTIONAL LAYER ON A SURFACE OF A THREE-DIMENSIONAL ELECTRONIC DEVICE
The present invention relates to an assembly to be used in an inkjet printer, an inkjet printer and a method for printing. The assembly comprises (i) a first fixture configured to hold a first print head; and (ii) at least two processing lines A, B, C, D, wherein each processing line A, B, C, D includes a first printing section in which a functional layer is printed on a surface of an electronic device, a sintering section spaced apart from the first printing section and configured to sinter the functional layer, wherein the sintered functional layer exhibits a crystal lattice structure, and a transport mechanism (4) configured to move from the printing section to the sintering section. The first fixture is movable from one processing line A, B, C, D to another processing line A, B, C, D.
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD FOR MANUFACTURING FLEXIBLE CIRCUIT BOARD
The present disclosure relates to a substrate processing apparatus and a substrate processing method, for manufacturing a flexible circuit board, and more specifically, to a substrate processing apparatus and a substrate processing method, for manufacturing a flexible circuit board, capable of manufacturing a flexible circuit board with a fine line width without undergoing a photolithographic process using a mask.
The substrate processing apparatus and the substrate processing method, for manufacturing a flexible circuit board, according to the present disclosure, can efficiently manufacture a flexible circuit board having a fine line width at low costs.
METHOD FOR MANUFACTURING PRINTED WIRING BOARD
A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.
Flexible circuit electrode array and method of manufacturing the same
A method for manufacturing a flexible circuit electrode array, comprising: a) depositing a metal trace layer containing a base coating layer, a conducting layer and a top coating layer on the insulator polymer base layer; b) applying a layer of photoresist on the metal trace layer and patterning the metal trace layer and forming metal traces on the insulator polymer base layer; c) activating the insulator polymer base layer and depositing a top insulator polymer layer and forming one single insulating polymer layer with the base insulator polymer layer; d) applying a thin metal layer and a layer of photoresist on the surface of the insulator polymer layer and selective etching the insulator layer and the top coating layer to obtain at least one via; and e) filling the via with electrode material. A layer of polymer is laid down. A layer of metal is applied to the polymer and patterned to create electrodes and leads for those electrodes. A second layer of polymer is applied over the metal layer and patterned to leave openings for the electrodes, or openings are created later by means such as laser ablation. Hence the array and its supply cable are formed of a single body. Alternatively, multiple alternating layers of metal and polymer may be applied to obtain more metal traces within a given width. The method provides an excellent adhesion between the polymer base layer and the polymer top layer and insulation of the trace metals and electrodes.
SUBSTRATES FOR STRETCHABLE ELECTRONICS AND METHOD OF MANUFACTURE
A bulk substrate for stretchable electronics. The bulk substrate is manufactured with a process that forms a soft-elastic region of the bulk substrate. The soft-elastic region includes a strain capacity of greater than or equal to 25% and a first Young's modulus below 10% of a maximum local modulus of the bulk substrate. The process also forms a stiff-elastic region of the bulk substrate. The stiff-elastic region includes a strain capacity of less than or equal to 5% and a second Young's modulus greater than 10% of the maximum local modulus of the bulk substrate.