[Summary]

The present invention relates to a multilayered printed circuit board having excellent durability while having a thin thickness, a method for manufacturing the same, and a semiconductor device using the same.

The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.

A printed circuit board comprises an epoxy-containing member, a first copper pattern disposed adjacent to the epoxy-containing member, and a first adhesion promoter layer interposed between the epoxy-containing member and the first copper pattern.

A semi-finished product for the production of connection systems for electronic components comprises two groups (A, B) of alternately applied conductive layers and insulating layers, wherein outer layers (2, 2) of the two groups (A, B) are facing each other to form a separation area for the groups (A, B) to be separated from each other to yield connection systems for electronic components and the separation area is overlapped and sealed on all sides thereof at least by the two insulating layers (4, 4) following the separation area. The method for the production of connection systems for electronic components is characterized by the following steps: a) orienting two groups (A, B) of alternately applied conductive layers and insulating layers (4, 4) to face each other with outer layers to form a separation area for the groups (A, B) to be separated from each other and safeguarding that the separation area is overlapped and sealed on all sides thereof at least by the two insulating layers (4, 4) following the separation area, b) processing the groups (A, B) of alternately applied conductive layers and insulating layer, c) cutting through the separation area along the edges thereof.

An asymmetric electronic substrate and method of making the substrate includes forming a first layer on each opposing major surface of a removable carrier layer, the first layer being a routing layer, simultaneously laminating the first layers, and building up subsequent layers on layers previously formed and laminated on the removable carrier layer iteratively. The subsequent layers including routing layers and a core layer formed on each side of the removable carrier layer, the core layer including through holes having a larger gauge than through holes included in the routing layers. A number of layers on a first side of the core layer, between the core layer and the carrier layer, is different than a number of layers on a second side of the core layer. The carrier layer is removed to produce two asymmetric substrates, each asymmetric substrate including one of the at least one core layers.

Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.

A method of manufacturing first and second component carriers includes: i) providing a separation component comprising a first separation surface and a second separation surface being opposed to the first separation surface, ii) coupling a first base structure having a first cavity with the first separation surface, iii) coupling a second base structure having a second cavity with the second separation surface, iv) placing a first electronic component in the first cavity, v) connecting the first base structure with the first electronic component to form the first component carrier, vi) placing a second electronic component in the second cavity, vii) connecting the second base structure with the second electronic component to form the second component carrier, viii) separating the first component carrier from the first separation surface of the separation component, and ix) separating the second component carrier from the second separation surface of the separation component.

An asymmetric electronic substrate and method of making the substrate includes forming a first layer on each opposing major surface of a removable carrier layer, the first layer being a routing layer, simultaneously laminating the first layers, and building up subsequent layers on layers previously formed and laminated on the removable carrier layer iteratively. The subsequent layers including routing layers and a core layer formed on each side of the removable carrier layer, the core layer including through holes having a larger gauge than through holes included in the routing layers. A number of layers on a first side of the core layer, between the core layer and the carrier layer, is different than a number of layers on a second side of the core layer. The carrier layer is removed to produce two asymmetric substrates, each asymmetric substrate including one of the at least one core layers.

Provided is a method of manufacturing a circuit board involves: preparing a composite laminate including a support, a release layer, and a multilayered circuit board; disposing the composite laminate on a stage such that one face of the composite laminate is put into tight contact with the stage; and releasing the support or the multilayered circuit board from the release layer such that the support or the multilayered circuit board forms a convex face with a curvature radius of 200 to 5000 mm while the face of the composite laminate is kept in tight contact with the stage. The method according to the present invention can prevent the occurrences of defects, for example, breaking in the support and cracking and wire disconnections in the multilayered circuit board in manufacturing of circuit boards, such as coreless circuit boards, and ensure stable release of the support or the multilayered circuit board.

A package structure, includes a metal layer, an insulating composite layer disposed thereon, a sealant bonded on the insulating composite layer, a chip embedded in the sealant, a circuit layer structure disposed on the sealant and the chip, and a protecting layer. The chip has a plurality of electrode pads exposed from the sealant. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has a plurality of conductive blind vias. The dielectric layer and the sealant are made of the same material. The circuit layer is disposed on the dielectric layer and extends into the conductive blind vias, and the bottommost circuit layer is electrically connected to the electrode pads through the conductive blind vias. The protecting layer is formed on the circuit layer structure and has a plurality of openings exposing a portion of the circuit layer structure.