H10N60/83

Superconducting stress-engineered micro-fabricated springs

A structure has a substrate, and a spring structure disposed on the substrate, the spring structure having an anchor portion disposed on the substrate, an elastic material having an intrinsic stress profile that biases a region of the elastic material to curl away from the substrate, and a superconductor film in electrical contact with a portion of the elastic material. A method of manufacturing superconductor structures includes depositing a release film on a substrate, forming a stack of films comprising an elastic material and a superconductor film, releasing a portion of the elastic material by selective removal of the release film so that portion lifts out of the substrate plane to form elastic springs. A method of manufacturing superconductor structures includes depositing a release film on a substrate, forming a stack of films comprising at least an elastic material, releasing a portion of the elastic material so that portion lifts out of a plane of the substrate to form elastic springs, and coating the elastic springs with a superconductor film.

REDUCING PARASITIC CAPACITANCE AND COUPLING TO INDUCTIVE COUPLER MODES
20210384402 · 2021-12-09 ·

A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.

Tapered Connectors for Superconductor Circuits
20210384126 · 2021-12-09 ·

A superconducting circuit includes a first component having a first connection point. The first connection point has a first width. The superconducting circuit includes a second component having a second connection point. The second connection point has a second width that is larger than the first width. The superconducting circuit includes a superconducting connector shaped to reduce current crowding. The superconducting connector electrically connects the first connection point and the second connection point. The superconducting connector includes a first taper positioned adjacent the first connection point and having a non-linear shape and a second taper positioned adjacent the second connection point.

Fabrication method using angled deposition and shadow walls

A method of fabricating a device, comprising forming portions of electronic circuitry and a shadow wall structure over a substrate, and subsequently depositing a conducting layer over the substrate by angled deposition of a conducting material in at least a first deposition direction at an acute angle relative to the plane of the substrate. The shadow wall structure is arranged to cast a shadow in the deposition, leaving areas where the conducting material is not deposited. The shadow wall structure comprises one or more gaps each shorter than a shadow length of a respective part of the shadow wall structure casting the shadow into the gap, to prevent the conducting material forming in the gaps and to thereby create regions of said upper conducting layer that are electrically isolated from one another. These are arranged to form conducting elements for applying signals to, and/or receiving signals from, the electronic circuitry.

Fabrication method using angled deposition and shadow walls

A method of fabricating a device, comprising forming portions of electronic circuitry and a shadow wall structure over a substrate, and subsequently depositing a conducting layer over the substrate by angled deposition of a conducting material in at least a first deposition direction at an acute angle relative to the plane of the substrate. The shadow wall structure is arranged to cast a shadow in the deposition, leaving areas where the conducting material is not deposited. The shadow wall structure comprises one or more gaps each shorter than a shadow length of a respective part of the shadow wall structure casting the shadow into the gap, to prevent the conducting material forming in the gaps and to thereby create regions of said upper conducting layer that are electrically isolated from one another. These are arranged to form conducting elements for applying signals to, and/or receiving signals from, the electronic circuitry.

FABRICATION METHOD USING ANGLED DEPOSITION AND SHADOW WALLS

A method of fabricating a device, comprising forming portions of electronic circuitry and a shadow wall structure over a substrate, and subsequently depositing a conducting layer over the substrate by angled deposition of a conducting material in at least a first deposition direction at an acute angle relative to the plane of the substrate. The shadow wall structure is arranged to cast a shadow in the deposition, leaving areas where the conducting material is not deposited. The shadow wall structure comprises one or more gaps each shorter than a shadow length of a respective part of the shadow wall structure casting the shadow into the gap, to prevent the conducting material forming in the gaps and to thereby create regions of said upper conducting layer that are electrically isolated from one another. These are arranged to form conducting elements for applying signals to, and/or receiving signals from, the electronic circuitry.

SUPERCONDUCTING QUBIT AND PREPARATION METHOD THEREOF, QUANTUM STORAGE DEVICE, AND QUANTUM COMPUTER
20220131064 · 2022-04-28 ·

The present disclosure provides a superconducting qubit. The superconducting qubit includes: a Josephson junction and a non-Josephson junction area, wherein the non-Josephson junction area includes a first layer of superconducting material, the first layer of superconducting material being superconducting material deposited on the non-Josephson junction area before ion milling on the Josephson junction and the non-Josephson junction area during preparation of the superconducting qubit.

Phononic-isolated kinetic inductance detector and fabrication method thereof

The present invention relates to a phononic-isolated Kinetic Inductance Detector (KID) and a method of fabrication thereof. The KID is a highly sensitive superconducting cryogenic detector which can be scaled to very large format arrays. The fabrication process of the KID of the present invention integrates a phononic crystal into a KID architecture. The phononic structures are designed to reduce the loss of recombination and athermal phonons, resulting in lower noise and higher sensitivity detectors.

EMBEDDED MICROSTRIP TRANSMISSION LINE

Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.

SACRIFICIAL MATERIAL FACILITATING PROTECTION OF A SUBSTRATE IN A QUBIT DEVICE

Devices, systems, methods, and/or computer-implemented methods that can facilitate protection of a substrate in a qubit device using sacrificial material are provided. According to an embodiment, a device can comprise a superconducting lead provided on a pillar of a sacrificial material provided on a substrate. The device can further comprise a collapsed superconducting junction provided on the substrate and coupled to the superconducting lead.