A nanowire structure that includes a conductive layer; conductive wires having first ends that contact the conductive layer and second ends that protrude from the conductive layer; and a lateral bridge layer that connects laterally a number of the conductive wires to provide a substantially uniform spacing between the conductive wires.

A nanowire structure that includes a conductive layer; conductive wires having first ends that contact the conductive layer and second ends that protrude from the conductive layer; and a lateral bridge layer that connects laterally a number of the conductive wires to provide a substantially uniform spacing between the conductive wires.

A dielectric ceramic composition including a first component and a second component. The first component comprises an oxide of Ca of 0.00 mol % to 35.85 mol % an oxide of Sr of 0.00 mol % to 47.12 mol %, an oxide of Ba of 0.00 mol % to 51.22 mol %, an oxide of Ti of 0.00 mol % to 17.36 mol %, an oxide of Zr of 0.00 mol % to 17.36 mol %, an oxide of Sn of 0.00 mol % to 2.60 mol %, an oxide of Nb of 0.00 mol % to 35.32 mol %, an oxide of Ta of 0.00 mol % to 35.32 mol %, and an oxide of V of 0.00 mol % to 2.65 mol %. The second component includes (by mass) at least (a) an oxide of Mn of 0.005% to 3.500% and (b) one or both of an oxide of Cu of 0.080% to 20.000% and an oxide of Ru of 0.300% to 45.000%.

A dielectric ceramic composition including a first component and a second component. The first component comprises an oxide of Ca of 0.00 mol % to 35.85 mol % an oxide of Sr of 0.00 mol % to 47.12 mol %, an oxide of Ba of 0.00 mol % to 51.22 mol %, an oxide of Ti of 0.00 mol % to 17.36 mol %, an oxide of Zr of 0.00 mol % to 17.36 mol %, an oxide of Sn of 0.00 mol % to 2.60 mol %, an oxide of Nb of 0.00 mol % to 35.32 mol %, an oxide of Ta of 0.00 mol % to 35.32 mol %, and an oxide of V of 0.00 mol % to 2.65 mol %. The second component includes (by mass) at least (a) an oxide of Mn of 0.005% to 3.500% and (b) one or both of an oxide of Cu of 0.080% to 20.000% and an oxide of Ru of 0.300% to 45.000%.

A capacitor includes a lower electrode including a first metal material and having a first crystal size in a range of a few nanometers, a dielectric layer covering the lower electrode and having a second crystal size that is a value of a crystal expansion ratio times the first crystal size and an upper electrode including a second metal material and covering the dielectric layer. The upper electrode has a third crystal size smaller than the second crystal size.

A capacitor includes a lower electrode including a first metal material and having a first crystal size in a range of a few nanometers, a dielectric layer covering the lower electrode and having a second crystal size that is a value of a crystal expansion ratio times the first crystal size and an upper electrode including a second metal material and covering the dielectric layer. The upper electrode has a third crystal size smaller than the second crystal size.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

A HfO2-based ferroelectric capacitor and a preparation method therefor, and a HfO2-based ferroelectric memory, relating to the technical field of microelectronics. The purpose of enlarging the memory window of the ferroelectric memory is achieved by inserting an Al.sub.2O.sub.3 intercalation layer having a coefficient of thermal expansion smaller than TiN between a dielectric layer and an upper electrode (TiN) of the ferroelectric capacitor. The HfO.sub.2-based ferroelectric capacitor comprises a substrate layer, a lower electrode, a dielectric layer, an Al.sub.2O.sub.3 intercalation layer, an upper electrode and a metal protection layer from bottom to top. The memory window can be increased, information misreading is effectively prevented, and therefore, the reliability of the memory is improved.

A multi-layer ceramic electronic component includes a ceramic body and an external electrode. The ceramic body includes an end surface facing in a first direction, and internal electrodes exposed from the end surface and laminated in a second direction orthogonal to the first direction. The external electrode is provided on the end surface and includes two protrusions that are formed along two peripheral portions of the end surface and protrude in the first direction, the two peripheral portions being disposed in a third direction orthogonal to the first direction and the second direction.