A capacitance element that includes a first lower electrode and a second lower electrode arranged adjacent to each other in a Y-axis direction on a substrate. A first dielectric layer is on the first lower electrode, and a second dielectric layer is on the second lower electrode. A first upper electrode and a second upper electrode are arranged adjacent to each other in an X-axis direction on the first dielectric layer, and a third upper electrode and a fourth upper electrode are arranged adjacent to each other in an X-axis direction on the second dielectric layer. Interlayer conductors are respectively in contact with the first through fourth upper electrodes. A first connection conductor connects the second interlayer conductor and the fourth interlayer conductor to each other.

A capacitor includes a capacitor element, an electrode disposed on an end face of the capacitor element, a bus bar connected to the electrode, and a case housing the capacitor element. The bus bar is extended from an opening of the case to outside the case. Outside the case, the bus bar includes an extension part and a connection terminal. The extension part extends in a first direction along a side face of the case. The connection terminal is connected to the extension part. Further, the case includes a supporting part disposed on the side face of the case. The supporting part supports the bus bar to form a space between the side face and the extension part.

A capacitor includes a capacitor element, an electrode disposed on an end face of the capacitor element, a bus bar connected to the electrode, and a case housing the capacitor element. The bus bar is extended from an opening of the case to outside the case. Outside the case, the bus bar includes an extension part and a connection terminal. The extension part extends in a first direction along a side face of the case. The connection terminal is connected to the extension part. Further, the case includes a supporting part disposed on the side face of the case. The supporting part supports the bus bar to form a space between the side face and the extension part.

A ceramic electronic component of the present invention includes: a ceramic element body; a terminal electrode formed on from an end surface to a side surface of the ceramic element body; and a lead terminal joined to the terminal electrode by a solder. A fillet of the solder is formed between the terminal electrode of a side surface at the ceramic element body and the lead terminal, and a coating layer is formed on a surface of the lead terminal that is in contact with the solder. The coating layer is formed of a metal component having a contact angle with the solder smaller than that of the lead terminal.

Disclosed herein is an LC filter that includes a conductive substrate, a first capacitive insulating film having one surface covered with the conductive substrate and other surface covered with a first capacitive electrode, a first inductor pattern having one end connected to the first capacitive electrode, a first terminal electrode connected to other end of the first inductor pattern, and a common terminal electrode connected to the conductive substrate.

An electronic device comprises a chip component including a terminal electrode, a case having an accommodation recess accommodating the chip component, a conductive terminal attached to the case and connected to the terminal electrode, and a case cover disposed on an opening-edge surface of the case so as to cover the accommodation recess. The opening-edge surface has an opening-edge recess at least partly covered by the case cover. The opening-edge recess and the case cover have a space therebetween. The space is filled with a resin.

An electronic device comprises a chip component including a terminal electrode, a case having an accommodation recess accommodating the chip component, a conductive terminal attached to the case and connected to the terminal electrode, and a case cover disposed on an opening-edge surface of the case so as to cover the accommodation recess. The opening-edge surface has an opening-edge recess at least partly covered by the case cover. The opening-edge recess and the case cover have a space therebetween. The space is filled with a resin.

A filter feedthrough for an AIMD includes ferrule with an insulator hermetically sealing a ferrule opening, both cooperatively separating a body fluid side from a device side. A first conductive pathway is hermetically sealed to and disposed through the insulator. A feedthrough capacitor is disposed on the device side and includes at least one active electrode plate disposed parallel and spaced from at least one ground electrode plate within a capacitor dielectric. A capacitor active metallization is electrically connected to the active electrode plate and is in non-electrically conductive relation with the ground electrode plate. A capacitor ground metallization is electrically connected to the ground electrode plate and is in non-electrically conductive relation with the active electrode plate. An anisotropic conductive layer is disposed on the device side. The anisotropic conductive layer electrically connects the capacitor active metallization to the first conductive pathway.

A filter feedthrough for an AIMD includes ferrule with an insulator hermetically sealing a ferrule opening, both cooperatively separating a body fluid side from a device side. A first conductive pathway is hermetically sealed to and disposed through the insulator. A feedthrough capacitor is disposed on the device side and includes at least one active electrode plate disposed parallel and spaced from at least one ground electrode plate within a capacitor dielectric. A capacitor active metallization is electrically connected to the active electrode plate and is in non-electrically conductive relation with the ground electrode plate. A capacitor ground metallization is electrically connected to the ground electrode plate and is in non-electrically conductive relation with the active electrode plate. An anisotropic conductive layer is disposed on the device side. The anisotropic conductive layer electrically connects the capacitor active metallization to the first conductive pathway.

A MIM structure and manufacturing method thereof are provided. The MIM structure includes a substrate having a first surface and a metallization structure over the substrate. The metallization structure includes a bottom electrode layer, a dielectric layer on the bottom electrode layer, a ferroelectric layer on the dielectric layer, a top electrode layer on the ferroelectric layer, a first contact electrically coupled to the top electrode layer, and a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to the bottom electrode layer.