The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

The capacitor array that includes: a capacitor layer including a plurality of capacitor portions divided by a plurality of through-portions and arranged in a plane, and the capacitor portions each have a first main surface and a second main surface that are opposite to each other in a thickness direction. The plurality of through-portions include a first through-portion extending in a first direction perpendicular to the thickness direction, and a second through-portion extending in a second direction perpendicular to the thickness direction and intersecting the first direction. In a sectional view, each of the first through-portion and the second through-portion independently has a taper having a width decreasing from one of the first main surface and the second main surface to the other main surface. The first through-portion has a taper angle that is different from a taper angle of the second through-portion.

The bushing includes a plurality of electrically conductive elements and at least one ultrasonic welding joint. The at least one ultrasonic welding joint is formed between one electrically conductive element and another electrically conductive element and mechanically and electrically connects the electrically conductive elements with each other.

A bus capacitor includes: multiple capacitor layers stacked along a thickness direction of the bus capacitor, a dielectric being filled between two adjacent capacitor layers; the multiple capacitor layers including multiple positive capacitor layers and multiple negative capacitor layers; a first hole extending along the thickness direction, the first hole running through the multiple positive capacitor layers, a first conductive member disposed in the first hole, and the first conductive member being in contact with the multiple positive capacitor layers to electrically connect the multiple positive capacitor layers with each other; a second hole extending along the thickness direction, the second hole running through the multiple negative capacitor layers, a second conductive member disposed in the second hole, and the second conductive member being in contact with the multiple negative capacitor layers to electrically connect the multiple negative capacitor layers with each other.

A bus capacitor includes: multiple capacitor layers stacked along a thickness direction of the bus capacitor, a dielectric being filled between two adjacent capacitor layers; the multiple capacitor layers including multiple positive capacitor layers and multiple negative capacitor layers; a first hole extending along the thickness direction, the first hole running through the multiple positive capacitor layers, a first conductive member disposed in the first hole, and the first conductive member being in contact with the multiple positive capacitor layers to electrically connect the multiple positive capacitor layers with each other; a second hole extending along the thickness direction, the second hole running through the multiple negative capacitor layers, a second conductive member disposed in the second hole, and the second conductive member being in contact with the multiple negative capacitor layers to electrically connect the multiple negative capacitor layers with each other.