An electronic device includes a case, a ceramic element, a first metal terminal, and a second metal terminal. The case includes a recess and a case lower surface facing opposite to its opening. The ceramic element is disposed in the recess and includes first and second main surfaces opposing to each other, a first electrode portion formed on the first main surface, and a second electrode portion formed on the second main surface. The first metal terminal includes a first mounting portion disposed on the case lower surface and being substantially parallel to the first and second main surfaces and a first electrode connection portion connected to the first electrode portion. The second metal terminal includes a second mounting portion disposed on the case lower surface and being substantially parallel to the first and second main surfaces and a second electrode connection portion connected to the second electrode portion.

Disclosed herein is a multilayer capacitor that includes a capacitor layer having a plurality of odd-numbered electrode layers which are positioned at odd-numbered rows and a plurality of even-numbered electrode layers which are positioned at even-numbered rows. The capacitor layer includes a first side surface to which the odd-numbered electrode layers are exposed, a second side surface to which the even-numbered electrode layers are exposed, and a first planar region. The first external terminal covers the first side surface so as to be connected to the odd-numbered electrode layers. The second external terminal covers the second side surface so as to be connected to the even-numbered electrode layers. The first external terminal covers also the first planar region and is connected to the first internal electrode layer through a first via conductor extending in a stacking direction.

Disclosed herein is a multilayer capacitor that includes a capacitor layer having a plurality of odd-numbered electrode layers which are positioned at odd-numbered rows and a plurality of even-numbered electrode layers which are positioned at even-numbered rows. The capacitor layer includes a first side surface to which the odd-numbered electrode layers are exposed, a second side surface to which the even-numbered electrode layers are exposed, and a first planar region. The first external terminal covers the first side surface so as to be connected to the odd-numbered electrode layers. The second external terminal covers the second side surface so as to be connected to the even-numbered electrode layers. The first external terminal covers also the first planar region and is connected to the first internal electrode layer through a first via conductor extending in a stacking direction.

An electronic component includes an element body having a dielectric and an inner electrode. The electronic component also includes at least one external electrode. Each external electrode includes a base layer, a plating layer and a covering layer. The base layer is formed on a plurality of surfaces of the element body to have a plurality of faces facing different directions. The base layer is connected to the inner electrode, and contains a metal. The plating layer is formed on a mounting face of the base layer and on a side face of the base layer to which the inner electrode is connected. The covering layer is formed on at least a portion of a face of the base layer, which is opposite to the mounting face of the base layer. A surface of the covering layer is less wettable than a surface of the plating layer by solder.

An electronic component includes an element body having a dielectric and an inner electrode. The electronic component also includes at least one external electrode. Each external electrode includes a base layer, a plating layer and a covering layer. The base layer is formed on a plurality of surfaces of the element body to have a plurality of faces facing different directions. The base layer is connected to the inner electrode, and contains a metal. The plating layer is formed on a mounting face of the base layer and on a side face of the base layer to which the inner electrode is connected. The covering layer is formed on at least a portion of a face of the base layer, which is opposite to the mounting face of the base layer. A surface of the covering layer is less wettable than a surface of the plating layer by solder.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers on both end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected to the internal electrode layers. The dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and the external electrode layers each include a sintered electrode layer in which dielectric particles including at least one of Ca, Zr, or Ti are included in a metal including Ni, and at least one of a Cu-plated layer, a Ni-plated layer, and a Sn-plated layer on an outer side of the sintered electrode layer.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers on both end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected to the internal electrode layers. The dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and the external electrode layers each include a sintered electrode layer in which dielectric particles including at least one of Ca, Zr, or Ti are included in a metal including Ni, and at least one of a Cu-plated layer, a Ni-plated layer, and a Sn-plated layer on an outer side of the sintered electrode layer.

A label and related method of manufacture that includes a fabric made of yarn, in either cut individual singles or continuous ribbon format in any length. The yarn includes a fiber that has been recycled, that is recyclable, that is organic, that is biodegradable, and/or that can be derived from a material that is known to be environmentally friendly. The yarn, in one embodiment, may include a fiber defined as “high filament count” material, above the current industry standard of 24 filaments, being in the range of 72 to 96 to 144 filaments or higher per individual yarn, in any denier range of 30 denier to 150 denier thickness, in natural raw white, optical dyed white, or dyed colors. These yarns can be independent of each other.

A label and related method of manufacture that includes a fabric made of yarn, in either cut individual singles or continuous ribbon format in any length. The yarn includes a fiber that has been recycled, that is recyclable, that is organic, that is biodegradable, and/or that can be derived from a material that is known to be environmentally friendly. The yarn, in one embodiment, may include a fiber defined as “high filament count” material, above the current industry standard of 24 filaments, being in the range of 72 to 96 to 144 filaments or higher per individual yarn, in any denier range of 30 denier to 150 denier thickness, in natural raw white, optical dyed white, or dyed colors. These yarns can be independent of each other.

A multilayer electronic component includes: a body including dielectric layers and first and second internal electrodes; a first external electrode including a first electrode layer connected to the first internal electrodes, a first conductive resin layer on the first electrode layer, and a first plating layer on the first conductive resin layer, and including a first connection portion on a third surface of the body and a first band portion extending on first and second surfaces of the body; and a second external electrode connected to the second internal electrodes. L2-L1 is greater than 10 μm in which L1 is a distance from the third surface to a distal end of the first conductive resin layer in the first band portion, and L2 is a distance from the third surface to a distal end of the first plating layer in the first band portion.