A mounted structure of a supporting-terminal-equipped capacitor chip includes first and second supporting terminals. The first supporting terminal includes a first helical electrically conductive portion extending in a first axial direction along a main surface. The second supporting terminal includes a second helical electrically conductive portion extending in a second axial direction along the main surface. The first helical electrically conductive portion is electrically connected to a first outer electrode at an outer peripheral side surface of the first helical electrically conductive portion. The second helical electrically conductive portion is electrically connected to a second outer electrode at an outer peripheral side surface of the second helical electrically conductive portion.

A three-terminal multilayer ceramic capacitor includes at least one surface electrode layer on a surface of a second internal electrode layer connected to a lateral surface external electrode. The surface electrode layer includes at least one of Sn, In, Ga, Zn, Bi, Pb, Fe, V, Y or Cu, which is different from a main component of the second internal electrode layer.

A three-terminal multilayer ceramic capacitor includes at least one surface electrode layer on a surface of a second internal electrode layer connected to a lateral surface external electrode. The surface electrode layer includes at least one of Sn, In, Ga, Zn, Bi, Pb, Fe, V, Y or Cu, which is different from a main component of the second internal electrode layer.

A ceramic electronic component includes: a body including dielectric layers and internal electrodes; and external electrodes disposed on the body and connected to the internal electrodes, in which the dielectric layers include a plurality of dielectric crystal grains, an average number of dielectric crystal grains per unit thickness (1 μm) of the dielectric layers is 6 or more, and td is 2.0 μm or less, td being an average thickness of at least one of the dielectric layers.

A ceramic electronic component includes: a body including dielectric layers and internal electrodes; and external electrodes disposed on the body and connected to the internal electrodes, in which the dielectric layers include a plurality of dielectric crystal grains, an average number of dielectric crystal grains per unit thickness (1 μm) of the dielectric layers is 6 or more, and td is 2.0 μm or less, td being an average thickness of at least one of the dielectric layers.

A multilayer electronic component includes: a body including a plurality of dielectric layers and internal electrodes disposed to face each other with each of the plurality of dielectric layers interposed therebetween; and external electrodes connected to the internal electrodes and disposed on outer surfaces of the body, wherein each of the plurality of dielectric layers includes a BaTiO.sub.3-based base material main component and an accessory component including dysprosium (Dy) and terbium (Tb), a content of terbium (Tb) is 0.2 mol or more and less than 1.0 mol based on 100 mol of the base material main component, and the dielectric layer includes a plurality of dielectric crystal grains having a particle size of 60 nm or more and 250 nm or less at a point (D50) at which a cumulative volume is 50% in a cumulative particle size distribution according to a particle size distribution system.

A multilayer electronic component includes: a body including a plurality of dielectric layers and internal electrodes disposed to face each other with each of the plurality of dielectric layers interposed therebetween; and external electrodes connected to the internal electrodes and disposed on outer surfaces of the body, wherein each of the plurality of dielectric layers includes a BaTiO.sub.3-based base material main component and an accessory component including dysprosium (Dy) and terbium (Tb), a content of terbium (Tb) is 0.2 mol or more and less than 1.0 mol based on 100 mol of the base material main component, and the dielectric layer includes a plurality of dielectric crystal grains having a particle size of 60 nm or more and 250 nm or less at a point (D50) at which a cumulative volume is 50% in a cumulative particle size distribution according to a particle size distribution system.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers on both end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected to the internal electrode layers. The dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and the external electrode layers each include a sintered electrode layer in which dielectric particles including at least one of Ca, Zr, or Ti are included in a metal including Ni, and at least one of a Cu-plated layer, a Ni-plated layer, and a Sn-plated layer on an outer side of the sintered electrode layer.

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers laminated alternately on each other, and external electrode layers on both end surfaces of the multilayer body in a length direction orthogonal or substantially orthogonal to a lamination direction, and each connected to the internal electrode layers. The dielectric layers each include at least one of Ca, Zr, or Ti, the internal electrode layers each include Cu, and the external electrode layers each include a sintered electrode layer in which dielectric particles including at least one of Ca, Zr, or Ti are included in a metal including Ni, and at least one of a Cu-plated layer, a Ni-plated layer, and a Sn-plated layer on an outer side of the sintered electrode layer.

A multilayer ceramic capacitor may include a monolithic body and interleaved first and second pluralities of electrodes extending from the first and second ends, respectively, of the monolithic body towards opposite ends of the monolithic body. A first margin distance and a second margin distance may be formed, respectively, between the electrodes and the opposite ends of the monolithic body. First and second external terminations may be respectively disposed along the first end and second end of the monolithic body and respectively connected with the first and second plurality of electrodes. A margin ratio between a length of the monolithic body and the first margin distance and/or second margin distance may be less than about 10. At least one of the first external termination or the second external termination may include a conductive polymeric composition.